This paper presents a design & implementation methodology for FPGA based MIL-STD-1553 Remote Terminal Sub-System using DDC's BU-61580 device. The interesting part of this paper is that it presents a design of non-processor remote terminal sub-system. The glue logic is put on one FPGA of 176 pins which initializes the BU-61580 in RT mode at power-on. The FPGA design was done using Viewlogic & Actel packages. The simulation has shown the correct results which was then followed by the implementation. In this paper, the design is presented for 9 sensors among which 5 are analog and 4 are digital. For the purpose of testing the circuit, the analog & digital sensors are simulated through the computer.
No Thumbnail Available
Date
Design and implementation of FPGA based non-processor MIL-STD-1553 remote terminal sub-system using DDC's BU-61580
Journal Title
Journal ISSN
Volume Title
Publisher
ISRO Satellite Centre
Abstract
1999
Description
Keywords
Computer simulation, Error correction, Field programmable gate arrays, Remote control, Sensor data fusion, Non-processor remote terminal sub-systems, Communication satellites
Citation
Journal of Spacecraft Technology, 1999, 9, 2, pp. 21-32