Faculty Publications

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Publications by NITK Faculty

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    Performance and Reliability Codesign for Superjunction Drain Extended MOS Devices
    (Institute of Electrical and Electronics Engineers Inc., 2017) Somayaji, J.; Kumar, B.S.; Bhat, M.S.; Shrivastava, M.
    Conventionally, integrated drain-extended MOS (DeMOS) like high-voltage devices are designed while keeping only performance targets for a given application in mind. In this paper, for the first time, performance and reliability codesign approach using 3-D TCAD has been presented for various superjunction (SJ) type DeMOS devices. In this context, how to effectively utilize the SJ concept in a DeMOS device for System on Chip applications, which often has stringent switching and RF performance targets, is explored in detail in this paper. Moreover, design and reliability tradeoffs for switching and RF applications are discussed, while considering two unique sets, one with fixed breakdown voltage and other with fixed ON-resistance. Finally, hot carrier generation, safe operating area concerns, and electrostatic discharge physics are explored and compared using 3-D TCAD simulations. © 1963-2012 IEEE.
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    Investigation of Performance Improvement in Drain Extended Longitudinal FinFETs for Thermal-aware Sustainable Electronics Applications
    (Springer Science and Business Media B.V., 2025) Nanjunda, A.; Nikhil, K.S.
    This work presents a comprehensive investigation of GaN-based Junctionless Drain Extended Longitudinal FinFET (DELFinFET) using Sentaurus TCAD simulations, targeting thermally robust and energy efficient semiconductor devices as a means to reduce the environmental footprint of electronic devices. Introducing a longitudinal fin achieves superior lateral electric field modulation, improved carrier transport, and enhanced electric control. This helps in improving the key analog performance metrics such as sub-threshold slope, leakage current (Ioff), transconductance (gm), and the switching ratio (Ion/Ioff). The results obtained highlight the potential of DELFinFET for low-power applications. A comparative evaluation is performed between the designed device and other device configurations to verify the effectiveness of the design. © The Author(s), under exclusive licence to Springer Nature B.V. 2025.
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    Temperature dependence of linearity parameters of GaN-based junctionless drain extended FinFET
    (Elsevier Ltd, 2025) Ashwini, N.; Nikhil, K.S.
    In this work, temperature dependent linearity parameters of Galliun Nitride (GaN, a wide gap material) based Junctionless Drain Extended FinFETs (JLDEFinFETs) for a temperature ranging from 100K to 450K are investigated using 3D thermodynamic TCAD simulation. An analysis of the transfer characteristics, off-current, transconductance, and its derivatives are carried out at various temperatures. Additionally, the impact of various linearity parameters, such as VIP2, VIP3, IIP3, IMD3, and the 1-dB compression point on temperature is studied in detail. The device under consideration has a metal gate contact which offers opportunities to tune its performance parameters like on-current, off-current and threshold voltage. A comparative analysis of the designed device with various devices is also carried out to validate the device design. © 2025 Elsevier Ltd