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Title: Improved tri-gate FinFET transistor with InGaAs
Authors: Sharma, B.S.
Bhat, M.S.
Issue Date: 2018
Citation: Proceedings of 2017 International Conference on Innovations in Information, Embedded and Communication Systems, ICIIECS 2017, 2018, Vol.2018-January, , pp.1-5
Abstract: Inclusion of the III-V semiconductors in Field Effect Transistor technology is frequent, now days. In this paper, a tri-gate FinFET using InGaAs is proposed. Current carrying capability of the FinFET is usually large, since tri-gate structure, hence an appropriate doping in the channel would improve the ON and OFF characteristics of the device. To get an excellent ION/Ioff, doping concentration in the channel and source/drain region is varied according to material requirements. Channel length Lg of the proposed device is 20 nm. With high-K dielectric H fO2 as oxide, metal gate-oxide stack in the FinFET is designed and simulations are performed. Simulation of FinFET with gate-oxide thickness tox = 1 nm and a channel width Wc = 10nm, exhibits Ion/Ioff = 10.801 � 103, subthreshold slope SS ? 62 mV/decade and drain-induced-barrier-lowering DIBL = 83.3 mV/V. � 2017 IEEE.
Appears in Collections:2. Conference Papers

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