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Title: Investigation and Design of Capacitor-Based Multilevel Inverters
Authors: Naik, Banavath Shiva
Supervisors: Suresh, Yellasiri
Issue Date: 2022
Publisher: National Institute of Technology Karnataka, Surathkal
Abstract: As a result of enormous research and development in multilevel invert- ers (MLIs), their presence in industries over a wide-ranging application is noticeable. With the advent of high-power semiconductors in the last two decades, conventional voltage source inverters (VSIs) are replaced by MLIs. Output voltage boosting property along with curtailment in the circuit voltage stress and component count are considered as the essen- tial topological features for the new MLI circuits. At present, electric vehicles and renewable power generation are subjects of high interest. In such applications, a secondary circuit such as front- or back-end boosting stage is incorporated into the converter to meet the requirements. In such cases, using MLIs with boosting ability is more logical and reduces the intermediate boosting stage or even eliminates them. Furthermore, most of the available high-power rotating machines require variable speeds and special control algorithms. A power conversion stage using semiconductor switches is required in these renewable energy systems and industrial ap- plications. Therefore, a deep understanding of the design of high-power converters is required for researchers and industrial engineers. Ever since the inception of MLIs, cascaded H-bridge (CHB), neutral point clamped (NPC), and flying capacitor (FC) converters are among the earli- est topologies deemed to be well-established. Though these converter cir- cuits have their remarkable peculiarities, they suffer from a control com- plexity, higher components. The Diode-clamped inverters require more power diodes. Also, the capacitor voltage balancing in diode-, capacitor- clamped MLIs is a severe problem that requires sophisticated modulation techniques and external balance circuitry. Since then, many derivatives and refinements to these classic topologies have been proposed. In recent years, the evolution of MLIs is tending to reduce the number of compo- nents, especially dc sources based on the combination of capacitors. In these topologies, dc sources are replaced with switched capacitors (SCs) to reduce the number of dc sources and the cost of the converter. SCs are used as alternative DC supply to boost the output voltage. Due to the self-voltage balancing property of SCs, an uncomplicated sensor-less i control scheme can be employed. SC-based converters are the basic alter- native solution that does not need any transformer to boost the voltage. This research work’s motivation stems from the demand to generate sub- stantial voltage levels while keeping the circuit reliability as high as pos- sible. Therefore, three different topologies with voltage boosting property are proposed in this thesis by taking advantage of the switched-capacitor multilevel inverter (SC-MLI) configurations. The offered solutions exhibit considerable topological improvements with reduced and control complex- ity. This thesis mainly deals with the design and development of multilevel converter topologies with the reduced number of power devices and real- time implementation of the converters. Firstly, a modified T-type multi- level inverter (MT-MLI) with a reduced part count is proposed. Besides, a sensor-based voltage balancing control to regulate the FC voltage is elaborated. Methods to extend the topology for higher voltage levels are studied. Detailed simulation and experimental studies are carried out to validate the proof of controllability of the proposed topologies and their associated control system. Secondly, a novel SC-based hexad boost 13-level topology with only three capacitors, 14 semiconductor switches, and one diode is introduced. The series-parallel technique is utilized effectively to balance the capacitor volt- ages. The circuit operation, modulation scheme, and extension for higher voltage levels are discussed. Capacitors’ voltage ripple loss and curve- fitting approaches to calculating the semiconductor losses are analyzed in detail. Results validating the performance of the proposed topology and control schemes are presented. Lastly, two hybrid MLI configurations are proposed: Boost hybrid multi- level inverter (BH-MLI), Hybrid nine-level inverter topology (HNIT) with voltage boosting ability, and less component count. Simple structure, and easy control are the additional benefits of the proposed arrangements. A simple logic gate based (LGB) switching controller is developed for the presented circuits. Extensions of BH-MLI for higher levels are presented. Further, the performance of the proposed circuits is validated experimen- ii tally with PD-PWM and round control methods at different modulation indices, load conditions. All the developed circuits are simulated in MATLAB/Simulink for stand- alone operations. All the topologies are tested experimentally in the lab- oratory at scaled-down ratings. Further, quantitative and generic cost comparisons are conducted among the state-of-art capacitor-based MLIs to highlight the superiority of the proposed configurations.
Appears in Collections:1. Ph.D Theses

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