Integrated Active-RC Continuous Time Filters for Low Voltage and Low Power Applications

Abstract

This research proposes a couple of continuous-time analog filters with other accessories for low voltage and low power applications. The proposed designs are targeted to operate on a power supply voltage of 0.5 V. The research focuses on designing continuous-time filters using standard n-well devices in 180 nm CMOS process. Initial part of the thesis outlines the design of a fifth order continuous time active-RC low pass Chebyshev filter which has been used as the test-vehicle. A Bulk driven, pseudodifferential, feed-forward compensated Operational Transconductance Amplifier (OTA) has been proposed which is used as the building block of the filter. The filter, having a bandwidth of 477 kHz (3 Mrad/sec), along with all the necessary accessories such as common mode feedback (CMFB) circuit, bias generating circuits and test buffers is realized on silicon from United Microelectronics Corporation (UMC). The post-silicon results reveal that the filter offers a bandwidth of 750 kHz with a Dynamic range of 46.33 dB at 0.5 V supply. The filter on silicon is found to offer higher bandwidth than designed for. The thesis presents justification for this observed deviation. The filter has the highest bandwidth and also the highest energy efficiency when compared with filters of same category found in the literature. A Figure of Merit (FOM) of 0.2 fJ stands as testimony for the energy efficiency of the proposed filter. The parasitics of OTA always put check on the maximum realizable filter bandwidth. The thesis presents a mathematical analysis of the effect of these parasitics on the filter response for a particular case of feed-forward compensated OTA. A first order activeRC filter has been taken for study. The maximum realizable bandwidth of the filter has ivbeen quantified as a function of frequency beyond which the OTA parasitics dominate, order of the filter and the desired minimum attenuation. The mathematical analysis is found to match well with the results of transistor level filter. The thesis also proposes four low power Common-mode Feedback (CMFB) circuits targeted for the pseudo-differential transconductor for operation on 0.5 V supply. All the proposed circuits offer high impedance (capacitive) with power consumption as low as 50 nW when used for a transconductor which consumes 10 µW. The absolute maximum deviation offered by these circuits over the nominal common-mode voltage of 0.25 V is found be 2.5% across process and temperature. An ultra low power fifth order Chebyshev filter is presented in the last part of the thesis. A feed-forward OTA architecture is proposed which uses CMOS inverter as the basic transconductor. The fifth order filter is designed in 180 nm CMOS technology to validate the proposed OTA. Power consumption of this filter, offering a bandwidth of 150 kHz, is as low as 21.79 µW when operating on 0.5 V. The simulated filter offers a dynamic range of 54.15 dB. Further, this concept has been extended to realize a filter in 90 nm n-well CMOS process. The ideas are validated using a second order Butterworth biquad filter. It is found that the bandwidth can be as high as 5 MHz while offering a dynamic range of 55.78 dB and consuming a power of 58.76 µW when operating on 0.5 V power supply.