Design of Barker-7 Radar Pulse Compressor Using DSP Architecture Minimization Techniques

Abstract

Pulse compression algorithms play an important role in achieving better range resolution (RR) in automobile radar and ultrasonic sensors. The RR is the sensor's capacity to distinguish between two targets positioned in the same angular direction but at different distances. The Digital Signal Processing Architecture (DSPA) used in the pulse compressor is crucial for reaching high speeds or reducing hardware needs. This work presents two unique radar pulse compressor DSPAs for Barker-7 sequences, based on latency and area. One proposed design is the unfolding DSPA technology, which increases sample rate and speed. At the same time, another architecture, the folding DSPA approach, reduces hardware utilization and power consumption. The proposed DSPA design architectures are implemented and verified with the Artix-7 FPGA Kit. The unfolded Barker-7 pulse compressor increased the speed by 1.87 times as compared to the standard broadcasting Barker-7 realization, as demonstrated by the hardware implementation results. Folded Barker-7 architecture consumed 89% less power than existing Barker-7 broadcast architecture. The DSPAs proposed for the Barker-7 pulse compressor are ideal for ultrasonic, sonar, and radar applications that require high speed and low power. © 2024 IEEE.