INVESTIGATION OF THE IMPACT OF BURIED OXIDE LAYER IN UID LAYER AND CHANNEL REGION ON THE BREAKDOWN VOLTAGE AND THE THRESHOLD VOLTAGE OF β-GALLIUM OXIDE BASED POWER FETS

Abstract

A ß-Ga<inf>2</inf>O<inf>3</inf>-based field-effect transistor with a buried oxide (BOX) layer is proposed for high-voltage applications such as electric vehicles and power ICs. In the proposed structure, the BOX layer is strategically incorporated within the channel region rather than extending into the unintentionally doped (UID) ß-Ga<inf>2</inf>O<inf>3</inf> region. This placement effectively modulates the distribution of the electric field, mitigating the crowding of the peaK electric field near the drain side, and significantly improving the breaKdown voltage. The BOX layer, composed of silicon dioxide (SiO<inf>2</inf>), introduces additional capacitance, enhancing the electrostatic control of the gate over the channel. However, TCAD simulations reveal that variations in the thicKness of the BOX layer have minimal impact on the threshold voltage (V<inf>tℎ</inf>), indicating that the dominant factors governing V<inf>tℎ</inf> remain primarily associated with doping concentration and gate worK function. An empirical expression for the breaKdown voltage and an analytical expression for the threshold voltage, which incorporates the thicKness of the BOX layer, are derived and validated using TCAD test vectors. The redistribution of the electric field reduces impact ionization, enhances carrier transport, and improves overall device reliability, maKing the BOX-integrated JLFET a promising candidate for next-generation high-power and high-voltage electronics. © © 2025 by ASME.