Faculty Publications
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Publications by NITK Faculty
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Item Design and implementation of single phase inverter based on Cuk converter for PV system(International Journal of Renewable Energy Research, 2017) Sabhahit, N.S.; Gaonkar, D.N.; Anandh, N.; Kumar, N.S.In this paper, analysis and hardware implementation of a single phase inverter based on Cuk converter for PV system is presented. The buck-boost characteristic of such a converter promotes flexibility for both grid tied as well as standalone connections where the ac voltage is either higher than or lesser than the dc input voltage. Further Cuk based topologies have the better efficiency and voltage regulation, which is a lacking feature in a basic boost or a buck configuration. The proposed system not only offers continuous input and output current but also controlled voltage over a wider range. Hence this topology can serve as an expedient alternative converter stage for photovoltaic applications. In the proposed bidirectional two-switch Cuk converter, DSPIC30F2010 controller is used for controlling the duty ratio of switching pulses. Also, this controller generates PWM signals for the switches of single phase H-bridge inverter. The hardware results for the developed prototype of a Cuk converter based single phase inverter are presented. The developed scheme can easily be scalable to a much larger rating of the PV system.Item Design and Implementation of a Sensorless Multilevel Inverter with Reduced Part Count(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, R.Y.This letter proposes a single-phase nine-level (9L) inverter topology suitable for grid-connected renewable energy systems. The proposed inverter is realized using a T-Type neutral-point-clamped inverter connected in cascade to a floating capacitor (FC) H-bridge. Additionally, two low-frequency switches are added across the dc-link enabling the inverter to generate a 9L waveform. A sensorless voltage control based on redundant switching state is developed and embedded with PWM controller, which is responsible for regulating the FC voltage at one-quarter of the dc source voltage. The proposed PWM technique employs the generation of 9L waveform without using any voltage sensor, thereby reducing the complexity of the overall control scheme. This, in turn, will make the overall system appealing for various industrial applications. In comparison to conventional and recent topologies, generation of the 9L waveform using a lower number of components is the notable contribution. Another important feature of the proposed inverter is that if FC H-bridge fails, it can be bypassed, and the inverter can still operate as a 5L inverter at its nominal power rating. Furthermore, a comprehensive comparison study is included which confirms the merits of the proposed inverter against those of other state-of-The-Art topologies. Finally, simulation and experimental results are included for validating the feasibility of the proposed system. © 1986-2012 IEEE.Item Dynamic partner selection in Cloud Federation for ensuring the quality of service for cloud consumers(World Scientific Publishing Co. Pte Ltd wspc@wspc.com.sg, 2017) Thomas, M.V.; Chandrasekaran, K.Cloud Computing has become the popular paradigm for accessing the various scalable and on-demand computing services over the internet. Nowadays, individual Cloud Service Providers (CSPs) offering specialized services to the customers collaborate to form the Cloud Federation, in order to reap the real benefits of Cloud Computing. By collaboration, the member CSPs of the federation achieve better resource utilization and Quality of Service (QoS), thereby increasing their business prospects. When a CSP runs out of resources in the Cloud Federation, in order to offload the customer requests for resources to other CSP(s), identifying a suitable partner is a challenging task due to the lack of global coordination among them. In this paper, we propose the design and implementation of an efficient partner selection mechanism in the Cloud Federation, using the Analytic Hierarchy Process (AHP) and the Technique for Order Preference by Similarity to Ideal Solution (TOPSIS) methods, and also considering the trust values of various CSPs in the federation. The AHP method is used to calculate the weights of the QoS parameters used in the TOPSIS method which is used to rank the various CSPs in the Cloud Federation according to the user requirements. Simulation results show the effectiveness of this approach in order to efficiently select the trustworthy partners in large scale federations to ensure the required QoS to the cloud consumers. © 2017 World Scientific Publishing Company.Item Design and implementation of active neutralpoint-clamped nine-level reduced device count inverter: An application to grid integrated renewable energy sources(Institution of Engineering and Technology journals@theiet.org, 2018) Sandeep, N.; Yaragatti, U.R.Multilevel inverters are one of the preferred choices in medium-voltage and high-power applications in the recent past. Active neutral-point-clamped (ANPC) inverter is the most popular topology, especially in the class of five-level (5L) inverters. In this study, a nine-level topology with improved output waveform quality is proposed based on ameliorating the 5L ANPC inverter with least modifications. The addition of only two switches operating at line frequency to the conventional 5L ANPC inverter while maintaining an identical precursor part count is the proposed modification. A logic form equation-based active voltage balancing scheme that is independent of load current and power factor is developed to regulate the flying capacitor voltage at the reference value. The operating principle, salient features, and the developed control scheme are comprehensively detailed. The operation of the proposed inverter considering a grid integrated case is simulated in MATLAB/ Simulink, and the results corresponding to steady-state and dynamic conditions are presented. The benefits of the proposed topology are elucidated by comparing it with other classic topologies considering various prominent viewpoints. This comparison has illustrated the proposed topology's distinctive characteristics and profound advantages. The performance validation, feasibility, and practicability of the proposed inverter are established through the experimental results obtained from a laboratory-scale prototype. © The Institution of Engineering and Technology 2017.Item Design and Implementation of Transformer-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. © 1972-2012 IEEE.Item A corner expanded slot antenna loaded with copper strips for dual-band circular polarization characteristics(John Wiley and Sons Inc. P.O.Box 18667 Newark NJ 07191-8667, 2020) Paul, P.M.; Kandasamy, K.; Sharawi, M.S.In this article, the design and implementation of a dual-band circularly polarized (CP) microstrip line fed square slot antenna with compact size is proposed. The proposed CP antenna consists of a square slot antenna with a pair of symmetric rectangular extensions on opposite corners and loaded with an array of inclined and truncated rectangular copper strips. The square slot with diagonal extensions resonates at 2.24 to 2.62 GHz with a 3 dB axial ratio (AR) bandwidth of 15.7%. Besides, loading it with an array of inclined and truncated rectangular copper strips helps produce a resonance at higher band with CP. The higher band operates between 3.26 and 5.18 GHz and centered at 4.52 GHz, with a 3 dB AR bandwidth of 45.5%. The polarization sense and resonant frequency of the proposed antenna can be independently tuned depending on the position and dimensions of the slot and strips, respectively. The proposed antenna is fabricated and measured in terms of impedance bandwidth, axial ratio bandwidth, peak gain, and radiation efficiency. Good agreement between the simulations and measurements of the prototype is obtained. © 2019 Wiley Periodicals, Inc.Item Design and implementation of a novel nine-level MT-MLI with a self-voltage-balancing switching technique(Institution of Engineering and Technology kvukmirovic@theiet.org, 2019) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.In this study, a novel nine-level modified T-type multilevel inverter (MT-MLI) with a simple capacitor balancing technique is proposed. The proposed MT-MLI circuit can generate higher levels with a single DC source and the minimum number of switching components. Each phase of the proposed topology contains ten switches and one flying capacitor (FC). The DC source voltage is divided into two parts with the help of capacitors. Phase disposition-sine pulse-width modulation technique is employed to regulate the DC-link capacitors and FC voltages. To reduce the control complexity of FC-based circuits, quarter-cycle selector is introduced to control the FC voltage within the given half fundamental cycle using redundant states, so an external capacitor charging setup is not required. Furthermore, to highlight the potential merits of the proposed MT-MLI, the comparison is made among state-of-the-art MLIs. Simulation verification of the MT-MLI is done using MATLAB/ Simulink, and then hardware verifications are done using the laboratory prototype setup with Opal-RT controller. Finally, adequate results are presented to validate the proposed MT-MLI. © The Institution of Engineering and Technology 2019Item Performance evaluation of high-frequency CLL resonant DC–DC converter operated with phase-shift and modified PWM gating scheme: Analysis, design and implementation(Institution of Engineering and Technology, 2020) Patil, U.; Nagendrappa, N.Normal phase-shift and modified pulse-width modulation gating schemes are proposed for a full bridge high-frequency capacitor–inductor–inductor (CLL) resonant DC–DC converter, and its performance is analysed in this study. Detailed modelling and the steady-state analysis of the converter are performed by using the fundamental harmonic approximation approach. Various modes of the converter operation with both the gating schemes are described and examined in detail. Zero-voltage switching of all the main switches is achieved by designing the resonant converter to operate in the above resonance mode. The optimum design of the converter is illustrated with the help of a flowchart and design curves. PSIM simulation is carried out and the experimental prototype is built to substantiate theoretical performance predictions. The simulation and experimental results are presented and compared. © The Institution of Engineering and Technology 2020Item Design and implementation of a signal processing ASIC for digital hearing aids(Elsevier B.V., 2022) Deepu, D.; Ramesh Kini, R.K.; Sumam David, S.People with hearing loss can be benefited from assistive devices like hearing aids. This article presents the implementation of a signal processing chip for digital hearing aid applications. The functionality of the proposed design was tested in real-time using two field programmable gate arrays (FPGAs), one of them modeled as a hearing aid processor and the other as an external audio CODEC. The hearing aid processor contains an 18-band 1/3-octave ANSI S1.11 filter bank, which performs the audiogram compensation and a dynamic range compression algorithm to restrict the output signal to an acceptable loudness. The functionality of an external audio CODEC was replicated in the other FPGA to act as the analog front end circuit of a hearing aid. Serial Peripheral Interface (SPI) was used for communication between the two FPGAs. The SPI protocol was modified to make the hearing aid programmable through the data in line of the interface itself. The proposed hearing aid chip was implemented using standard cell based design flow with a 5x5 mm fixed die size intended to fit in a 48-pin package. © 2022 Elsevier B.V.Item A Novel Single-Layered Dual-Wideband Circularly Polarized Asymmetric Slot Antenna for Wireless Applications(Electromagnetics Academy, 2024) Shankaraiah, P.H.; Shet, N.S.V.; Kandasamy, K.This work focuses on the design and implementation of a dual-wideband asymmetric square-shaped slot radiator with coplanar waveguide (CPW) feed for circular polarization (CP) characteristics. The proposed radiator has inward ground plane extensions in the form of square and rectangular strips on the diagonal corners of the slot. By optimizing the size of strips, a dual-band antenna with CP behaviour is obtained. The inverted L-shaped grounded strip improves axial ratio bandwidth (ARBW). The extended signal line terminated in a wide tuning stub significantly improves impedance bandwidth (IBW) and also further enhances ARBW. The designed asymmetric slot radiator is fabricated using an FR-4 substrate material of dimensions 50×50×1.6 mm3. This antenna design gives flexibility to alter polarization sense at the dual frequency bands. Further, edge effects are analyzed through electric field distribution, and their impact on impedance and AR characteristics are studied. It is designed, fabricated, and tested, and shows right-hand circular polarization (RHCP) response at 3 GHz and 7.5 GHz in the +Z direction. The experimentally verified results show −10-dB IBWs of 40.12% (range from 2.61 GHz to 3.92 GHz) and 40.21% (range from 6 GHz to 9.02 GHz), and 3-dB ARBWs are 20% (range from 2.70 GHz to 3.30 GHz) and 40.21% (range from 6 GHz to 9.02 GHz) at the resonance bands. The experimentally measured and simulated performance parameters of the prototype are in close agreement. The proposed perturbed slot radiator is well suited for Wi-Fi 6E communication and remote sensing applications. © 2024, Electromagnetics Academy. All rights reserved.