Conference Papers

Permanent URI for this collectionhttps://idr.nitk.ac.in/handle/123456789/28506

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Subject: search.filters.subject.Pulse width modulation

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    Synchronized SVPWM algorithm for overmodulation region for three-level VSI
    (2010) Veeranna, S.B.; Yaragatti, U.R.; Beig, A.R.
    Synchronization is essential for the satisfactory operation of VSI in high power applications. With proper selection of switching states it is possible to obtain synchronization and symmetry in space vector pulse width modulation (SVPWM) algorithm. A novel SVPWM based switching algorithm, which results in improved THD and increased fundamental voltage in overmodulation region by maintaining synchronization and symmetry is presented in this paper. A simple method to determine the switching sequence to achieve synchronization, quarter wave symmetry, half wave symmetry and three phase symmetry in overmodulation region is presented. The proposed algorithm is simulated and its performance in terms of the THD and magnitude of fundamental voltage of output is studied in the overmodulation region. The results show the improved performance of the proposed algorithm compared to the existing algorithms. The proposed algorithm is verified experimentally on a constant v/f three level VSI fed induction motor drive. © 2010 IEEE.
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    Performance analysis of PWM strategies for cascaded H-bridge three-level inverter
    (2011) Veeranna, S.B.; Beig, A.R.; Yaragatti, U.R.
    Multilevel inverters with various pulse width modulation strategies have established their importance in high power high performance industrial applications, as they can synthesize output waveform with improved harmonic spectrum. This paper presents the performance analysis and comparison of different PWM strategies for cascaded H-bridge three-level inverter in terms of line voltage and motor current THD with their fundamental components. It is shown that harmonic loss minimized optimal-SHEPWM strategy gives better results in terms of voltage THD compared to SPWM, SVPWM and SHEPWM strategies. © 2011 IEEE.
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    Architectural framework of on-board integrator: An interface for grid connected EV
    (Institute of Electrical and Electronics Engineers Inc., 2017) Hampannavar, S.; Likassa, K.; Ayenew, E.; Sandeep, N.; Yaragatti, U.R.
    Vehicle to Grid (V2G) is the concept of connecting a group of electric vehicles (EV) to the grid for power transaction. EVs can be connected to the grid through the home interface or through the chargers available at charging stations. In this paper, a single phase on-board charger with low complexity control scheme is proposed for EV power transaction. The power flow from and to the grid is processed using two stage cascaded converters consisting of a bidirectional DC-DC and DC-AC converters. The LCL filter is used as an interface between DC-AC converter and the grid to attenuate the grid current harmonics. A proportional resonant (PR) controller is employed for the control of grid current and to enable the unity power factor operation of the DC-AC converter. The setbacks associated with the conventional proportional-integral (PI) controller for single phase system is elevated by employing PR controller. Filter design guidelines and the control strategy developed for the proposed system is numerically simulated and verified with extensive simulation carried using MATLAB/SIMULINK. The results demonstrating the feasibility and viability of the proposed system are presented. © 2017 IEEE.
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    A bus-clamping pulse width modulation method for a dodecagonal space vector generation scheme for 3-phase open-end winding induction motor drives
    (Institute of Electrical and Electronics Engineers Inc., 2017) Arumalla, R.T.; Figarado, S.
    Obtaining better harmonic profile at relatively lower switching frequencies is one of the key tasks in the present day power electronics world. Several pulse width modulation (PWM) techniques have been developed earlier in time, to reduce the harmonic content from the output of the inverter. Dodecagonal space vector generation scheme is one of them, which eliminates the most dominant lower order harmonics for the entire modulation range. In this paper, bus-clamping PWM technique is developed for a dodecagonal space vector structure, which is capable of reducing the switching frequency in the linear modulation range compared to conventional dodecagonal space vector technique. In order to compare the performance of the PWM schemes in terms of harmonic content, analytical expressions are derived based on the notion of stator flux ripple in the space vector domain. The results are verified by simulating and comparing the voltage harmonic distortion of the scheme with conventional dodecagonal scheme in terms of voltage weighted total harmonic distortion (VWTHD) and current total harmonic distortion (ITHD). © 2017 IEEE.