Conference Papers

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    Heuristic-based iot application modules placement in the fog-cloud computing environment
    (Institute of Electrical and Electronics Engineers Inc., 2018) Natesha, B.V.; Guddeti, R.M.
    Nowadays many Smart City applications make use of Internet of Things (IoT) devices for monitoring the environment. The increase in use of IoT for smart city applications causes exponential increase in the volume of data. Using centralised cloud for time sensitive IoT applications is not feasible due to more delay because of the network congestion. Hence, fog computing is used for processing the data near to the edge of the network, where processing is done by distributed network nodes. But, there is a challenge to select the fog nodes which can host and process the application modules. The placement of application module on these fog devices is known as NP-hard problem. Hence, we need better placement strategies to decide placement of application modules in fog infrastructure to minimize the application latency. In this paper, we design a First-Fit Decreasing (FFD) heuristic based approach for placing IoT application modules on Fog-Cloud and carried out the experiment using iFogsim simulator. The simulation results demonstrate that the proposed method shows significant decrease in both the application latency and energy consumption of Fog-Cloud as compared to the benchmark method. © 2018 IEEE.
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    Machine Learning Based Framework to Predict Performance Evaluation of On-Chip Networks
    (Institute of Electrical and Electronics Engineers Inc., 2018) Kumar, A.; Talawar, B.
    Chip Multiprocessors(CMPs) and Multiprocessor System-on-Chips(MPSoCs) are meeting the ever increasing demand for high performance in processing large scale data and applications. There is a corresponding increase in the volume and frequency of traffic in the Network-on-Chip(NoC) architectures like CMPs and SoCs. NoC performance parameters like network latency, flit latency and hop count are critical measures which directly influence the overall performance of the architecture and execution time of the application. Unfortunately, cycle-accurate software simulators become slow for interactive use with an increase in architectural size of NoC. In order to provide the chip designer with an efficient framework for accurate measurements of NoC performance parameters, we propose a Machine Learning(ML) framework. Which is designed using different ML regression algorithms like Support Vector Regression(SVR) with different kernels and Artificial Neural Networks(ANN) with different activation functions. The proposed learning framework can be used to analyze the performance parameters of Mesh and Torus based NoC architectures. Results obtained are compared against the widely used cycle-accurate Booksim simulator. Experiments were conducted by variables like topology size from 2\times 2 to 30\times 30 with different virtual channels, traffic patterns and injection rates. The framework showed an approximate prediction error of 5% to 8% and overall minimum speedup of 1500\times to 2000\times. © 2018 IEEE.
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    Situation-Based Congestion Control Strategies for Wired and Wireless Networks
    (Institute of Electrical and Electronics Engineers Inc., 2018) Kharat, P.; Kulkarni, M.
    Performance of transport layer is measured mostly in terms of packet delivery ratio, transmission delay, and throughput. Congestion control (CC) strategies are responsible for transport layer performance. There are different congestion control algorithms are designed and developed by researchers to handle shared, highly distributed and heterogeneous environment. In this paper, we are analyzing most of the popular congestion control algorithms based on link state, type of traffic, mode of transmission and bandwidth delay product (BDP). In the proposed algorithmic solutions, networking researchers not only looking for congestion but also taking care of effective use of network resources in different types of environments such as wired, wireless, high-speed, long-delay, etc. To avoid severe congestion based on feedback mechanism few packets are dropped randomly by using active queue management (AQM) techniques. Using explicit congestion notification (ECN) mechanism unnecessary packet dropping is avoided. Data center network (DCN) uses a different approach to handle congestion. © 2018 IEEE.
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    Floorplan Based Performance Estimation of Network-on-Chips using Regression Techniques
    (Institute of Electrical and Electronics Engineers Inc., 2019) Kumar, A.; Talawar, B.
    An intra-communication problem between the Intellectual Properties(IPs) caused by the growth of a number of cores on single chips in System-on-Chip(SoC) gave rise to new a system architecture called Network-on-Chip(NoC). The early stages of designing NoC can be done using cycle-accurate NoC simulators, but they become slow as the architecture size of NoC increases. Hence a machine learning framework is being proposed by considering two scenarios i,e. A fixed delay between the components and floorplan based delay among the components of NoC. This framework is modeled using distinct Machine Learning(ML) regression algorithms to predict performance parameters of NoCs considering uniform random and transpose traffic patterns. Complete performance analysis of Mesh NoC architecture can be done by using the proposed ML framework. Booksim simulator results are used to verify effectiveness of proposed framework and it showed an overall speedup of 2000× to 2500×. © 2019 IEEE.
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    Accurate Router Level Estimation of Network-on-Chip Architectures using Learning Algorithms
    (Institute of Electrical and Electronics Engineers Inc., 2019) Kumar, A.; Talawar, B.
    The problem of intra-communication between the Intellectual Properties(IPs) due to the rise in the amount of cores on single chips in System-on-Chip(SoC). Network-on-Chips(NoCs) has emerged as a reliable on-chip communication framework for Chip Multiprocessors and SoCs. Estimating NoC power and performance in the early stages has become crucial. We employ Machine Learning(ML) approaches to estimate architecture-level on-chip router models and performance. Experiments were carried out with distinct topology sizes with various virtual channels, injection rates, and traffic patterns. Booksim and Orion simulators are used to validate the results. Approximately 6% to 8% prediction error and a minimum speedup of 1500 × to 2000 × were shown in the framework. © 2019 IEEE.
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    A Support Vector Regression-Based Approach to Predict the Performance of 2D 3D On-Chip Communication Architectures
    (Institute of Electrical and Electronics Engineers Inc., 2019) Nirmal Kumar, A.; Talawar, B.
    Recently, Networks-on-Chips (NoCs) have evolved as a scalable solution to traditional bus and point-to-point architecture. NoC design performance evaluation is largely based on simulation, which is extremely slow as the architecture size increases, and it gives little insight on how distinct design parameters impact the actual performance of the network. Simulation for optimization purposes is therefore very difficult to use. In this paper, we propose a Support Vector Regression(SVR)-based framework, which can be used to analyze the performance of 2D and 3D NoC architectures. Experiments were conducted by varying architecture sizes with different virtual channels, injection rates. The framework proposed can be used to obtain fast and accurate NoC performance estimates with a prediction error 2% to 4% and minimum speedup of 3000 × to 3500×. © 2019 IEEE.
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    UPM-NoC: Learning based framework to predict performance parameters of mesh architecture in on-chip networks
    (Springer, 2020) Kumar, A.; Talawar, B.
    Conventional Bus-based On-Chips are replaced by Packet-switched Network-on-Chip (NoC) as a large number of cores are contained on a single chip. Cycle accurate NoC simulators are essential tools in the earlier stages of design. Simulators which are cycle accurate performs gradually as the architecture size of NoC increases. NoC architectures need to be validated against discrete synthetic traffic patterns. The overall performance of NoC architecture depends on performance parameters like network latency, packet latency, flit latency, and hop count. Hence we propose a Unified Performance Model (UPM) to deliver precise measurements of NoC performance parameters. This framework is modeled using distinct Machine Learning (ML) regression algorithms to predict performance parameters of NoCs considering different synthetic traffic patterns. The UPM framework can be used to analyze the performance parameters of Mesh NoC architecture. Results obtained were compared against the widely used cycle accurate Booksim simulator. Experiments were conducted by varying topology size from 2×2 to 50×50 with different virtual channels, traffic patterns, and injection rates. The framework showed an approximate prediction error of 5% to 6% and overall minimum speedup of 3000× to 3500×. © Springer Nature Singapore Pte Ltd 2020.
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    Fog-Based Video Surveillance System for Smart City Applications
    (Springer Science and Business Media Deutschland GmbH info@springer-sbm.com, 2021) Natesha, B.V.; Guddeti, G.R.M.
    With the rapid growth in the use of IoT devices in monitoring and surveillance environment, the amount of data generated by these devices is increased exponentially. There is a need for efficient computing architecture to push the intelligence and data processing close to the data source nodes. Fog computing will help us to process and analyze the video at the edge of the network and thus reduces the service latency and network congestion. In this paper, we develop fog computing infrastructure which uses the deep learning models to process the video feed generated by the surveillance cameras. The preliminary experimental results show that using different deep learning models (DNN and SNN) at the different levels of fog infrastructure helps to process the video and classify the vehicle in real time and thus service the delay-sensitive applications. © 2021, The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.
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    LCS : Alleviating Total Cold Start Latency in Serverless Applications with LRU Warm Container Approach
    (Association for Computing Machinery, 2023) Sethi, B.; Addya, S.K.; Ghosh, S.K.
    Serverless computing offers "Function-as-a-Service"(FaaS), which promotes an application in the form of independent granular components called functions. FaaS goes well as a widespread standard that facilitates the development of applications in cloud-based environments. Clients can solely focus on developing applications in a serverless ecosystem, passing the overburden of resource governance to the service providers. However, FaaS platforms have to bear the degradation in performance originating from the cold starts of executables i.e. serverless functions. The cold start reflects the delay in provisioning a runtime container that processes the functions. Each serverless platform is handling the problem of cold start with its own solution. In recent times, approaches to deal with cold starts have received the attention of many researchers. This paper comes up with an extensive solution to handle the cold start problem. We propose a scheduling approach to reduce the cold start occurrences by keeping the containers alive for a longer period of time using the Least Recently Used warm Container Selection (LCS ) approach on Affinity-based scheduling. Further, we carried out an evaluation and compared the obtained results with the MRU container selection approach. The proposed LCS approach outperforms by approximately 48% compared to the MRU approach. © 2023 ACM.