Conference Papers
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Item FPGA Accelerated Automotive ADAS Sensor Fusion(Institute of Electrical and Electronics Engineers Inc., 2023) Swamy, B.G.; Pardhasaradhi, B.; Shripathi Acharya, U.S.; Srihari, P.; Reddy, S.; Annavajjala, R.Fusion of multi-modal sensor data is crucial to improve the performance of advanced driver assistance and safety systems. Usually, sensors such as radars, lidars, and cameras work individually to provide the time-varying kinematics (also referred to as tracks) of other vehicles and objects in the field of view of the ego vehicle. Further, these individual tracks are fused in a decentralized manner to achieve the fused tracks. For an automotive vehicle, low-latency and high-speed sensor fusion is a requirement to improve the overall safety. Rather than running the entire fusion algorithm in the central processing unit, some portion of the code or the whole fusion algorithm can be accelerated on a field programmable gate array to improve the overall functionality. With this objective, in this paper we propose a dedicated digital signal processing (DSP) architecture to realize the fusion algorithm which involves computation of fused state and covariance matrix by making use of matrix-to-matrix multiplications and matrix inversion. The matrix inversion is carried out using an efficient LU decomposition method, and matrix multiplication is realized as a vector-to-vector multiplication DSP architecture. Moreover, a folded DSP architecture is proposed for the state and covariance sub-modules to accelerate the overall functionality. Simulations are presented for two-dimensional constant velocity (CV) model with 4-dimensional state space, three-dimensional CV model with 6-dimensional state space, and three-dimensional constant acceleration (CA) model with 9-dimensional state space. Our results indicate that the proposed architecture is well suited for automotive sensor fusion. © 2023 IEEE.Item DSP Architectures of Covariance Intersection Fusion Algorithm for Automotive Sensor Fusion(Institute of Electrical and Electronics Engineers Inc., 2023) Praharshita, D.S.L.; Achala, G.; Srihari, P.; Shripathi Acharya, U.S.; Pardhasaradhi, B.The data fusion from sensors within the automotive vehicle is vital for improved accuracy and safety. The centralized and information matrix fusion (IMF) algorithms are famous for providing an optimal fusion estimate. However, the IMF is not viable in automotive sensor fusion applications due to the limited bandwidth and low hardware resources. Hence, distributed fusion technology is widely adopted in the automotive sensor applications to achieve high-speed and low-area realizations. This paper proposes three digital signal processing (DSP) architectures for covariance intersection (CI) fusion algorithm: Pipelined-traditional CI, adder-ladder CI, and pipelined adder-ladder CI. The proposed DSP architectures are evaluated with hardware resource consumption (multipliers, adders, and delays), maximum achievable frequency, and latency of the architecture. In addition, proposed CI algorithms for Digital Signal Processing (DSP) architectures are compared with IMF DSP architectures. The hardware resources and optimal pipeline stages required for CI with respect to N number of sensors are provided. The traditional pipeline algorithm requires N number of stages where as the proposed pipelined version of adder-ladder CI requires a N-1 pipeline stage with additional 7N-1 and 7N-3 delay elements for even and odd number of sensors to achieve the overall system operating frequency to an operation of multiplier. The proposed DSP architectures are suitable for automotive sensor fusion due to their high operating frequency and low hardware resources. © 2023 IEEE.