Conference Papers
Permanent URI for this collectionhttps://idr.nitk.ac.in/handle/123456789/28506
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Item A Novel PWM Technique for MPPT Tracking of PV-Based Cascaded H-bridge Multi-level Inverter(Institute of Electrical and Electronics Engineers Inc., 2023) Maheswari, G.; Manjunatha Sharma, K.M.; Prabhakaran, P.This paper presents a novel Pulse Width Modulation (PWM) technique designed for a Cascaded H-Bridge (CHB) grid-tied multilevel inverter used in Photovoltaic (PV) systems, featuring a single-stage power conversion. Each inverter's output voltage adopts a quasi-square waveform tailored to correspond with the power generated by the respective solar panel. A key highlight of this technique is its simplicity, avoiding complex implementation. By incorporating the proposed PWM technique into the cascaded H-Bridge inverters, it efficiently optimizes the Maximum Power Point Tracking (MPPT) for each PV panel, regardless of whether the irradiation conditions are uniform or non-uniform, while simultaneously achieving DC capacitor voltage balance. Moreover, employing this PWM technique simplifies the implementation process on a DSP, avoiding unnecessary complexity. © 2023 IEEE.Item Implementation of Sorted Stair-Case Modulation and Sorted Phase Disposition PWM for Grid-Tied Multi-Level Inverter(Institute of Electrical and Electronics Engineers Inc., 2023) Maheswari, G.; Manjunatha Sharma, K.M.; Prabhakaran, P.Integrating a multilevel inverter with the grid provides advantages in high-power and high-voltage applications, including reduced harmonic distortion without a transformer. This paper presents the implementation of Sorted stair-case modulation (SSCM) and Sorted Phase disposition (SPD) Pulse Width Modulation (PWM) techniques for a Grid-Tied Cascaded H-Bridge (CHB) multilevel inverter featuring single-stage power conversion. SSCM and SPD PWM techniques are used to track the MPPT of each PV panel under uniform and non-uniform irradiation conditions if the PV panels are connected to the inverter's input terminals. A centralized current controller has been designed for the Grid-tied multilevel inverter system. Furthermore, a simulation has been developed to compare the power quality of the grid current and voltage between SSCM and SPD-PWM. © 2023 IEEE.Item Implementation of a Novel Nine-Level Quadruple Boosting Inverter(Institute of Electrical and Electronics Engineers Inc., 2024) Maheswari, G.; Manjunatha Sharma, K.M.; Prabhakaran, P.This paper proposes a novel nine-level quadruple-boosting multilevel inverter (MLI) that uses a single DC source and requires only ten power switches, one diode, and three capacitors. This design utilizes switched capacitors (SC) with a common ground (CG), achieving a four-fold voltage boost without needing an extra boost converter. The common grounding mitigates leakage current, making the system more efficient. In this proposed topology, the capacitors are self-balanced. The proposed inverter topology offers several advantages compared to existing nine-level inverters, such as significantly reducing leakage current due to common ground configuration, boosting capability, and using fewer components. MATLAB Simulink simulations demonstrate the superior effectiveness of the proposed nine-level quadruple-boosting MLI. © 2024 IEEE.Item A Novel Five-Level Double-Boost Inverter with Reduced Spike Current(Institute of Electrical and Electronics Engineers Inc., 2024) Maheswari, G.; Manjunatha Sharma, K.M.; Prabhakaran, P.This paper proposes a novel five-level double-boosting multi-level inverter (MLI) that uses a single DC source and requires only six power switches, one diode, and one capacitor. This design enables soft charging of the capacitor by integrating a charging inductor, which helps minimize or completely avoid large inrush or spike currents in the charging pathway. In this proposed topology, the capacitor is self-balanced. The proposed inverter topology offers several advantages compared to existing five-level inverters, such as significantly reducing inrush current, boosting capability, lower total standing voltage (TSV), common ground configuration, higher efficiency, and using fewer components. MATLAB Simulink simulations demonstrate the superior effectiveness of the proposed five-level double-boosting MLI in terms of reducing spike current. © 2024 IEEE.