Conference Papers

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Author: search.filters.author.Gupta, M.P.

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    A Wideband Microstrip Line-Based Balun Structure for High Power Amplifier Applications
    (Springer Science and Business Media Deutschland GmbH, 2023) Gupta, M.P.; Gorre, P.; Kumar, S.; Song, H.
    This paper proposes a balun matching technique to achieving a high output power and wide bandwidth. The proposed structure includes microstrip transmission line-based even and odd mode-matching circuits. A three-port unipolar microstrip line is designed to transform the balanced load termination to 50 Ω unbalanced port impedance. The proposed network design is based on real symmetrical four port network with open ended transmission line is inserted between the middle of the structure. To improve the isolation, transmission coefficient parameter and match the 50 Ω termination, a resistive network is inserted between the two balanced ports. The proposed structure is simulated in Keysight Technologies Advanced Design System (ADS), fabrication is done by using 0.51 mm RT Duriod substrate alignments. To verify the design concept, first of all, a wideband microstrip matching technique is designed and characterized at the frequency of L5 band (1.17 GHz). Then a prototype of microstrip transmission line-based wideband balun matching circuit is designed and fabricated. Analytical design equations have been derived for the even mode as well as odd mode techniques which satisfied the results. The proposed balun could overcome power loss mechanism over traditional transmission line structures and can utilize for high power application. © 2023, The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.
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    A L/S/C/X/Ku-Band Three-Stack, Two stages Fully Integrated CMOS Power Amplifier with 20.9 % PAE Using T-Network
    (Institute of Electrical and Electronics Engineers Inc., 2023) Kumar, K.; Kumar, S.; Gupta, M.P.
    This work proposes an L/S/C/X/Ku-Band three-stack two stages fully integrated CMOS power amplifier (PA) that realized in 65nm and achieves high efficiency, high output power over wide impedance bandwidth from 2-20 GHz. The proposed PA circuit comprises of T-network broadband input power match design, interstage tuning network and output power stage. The interstage tuning network is employed to achieve an excellent gain (|S21|) flatness of 16.3 ± 0.9 dB. The proposed PA design is employed 3-stack of transistor under supply of 3V at stage-1 followed LC and stage-2 to achieve high output power. The load pull analysis is performed to optimize the T- type output matching network for achieving PAE of 20.9 % and output power of 15.97 dBm at 7 GHz with 50 Ω load impedance. Besides, this PA provides 1 dB output compression point of 11.2 ± 0.8 dBm over full frequency band and also achieves the output third order intercept point of 23.2 dBm at 7 GHz using two tone signal. © 2023 IEEE.