Conference Papers

Permanent URI for this collectionhttps://idr.nitk.ac.in/handle/123456789/28506

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Author: search.filters.author.Bhat, K.N.

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    Impact of the diaphragm structure on the linearity and temperature sensitivity of low-pressure piezo-resistive MEMS pressure sensors
    (Institute of Physics Publishing helen.craven@iop.org, 2020) Nithin, N.; Rao, R.; Bhat, K.N.
    This paper presents result of a detailed simulation study aimed at optimizing the different diaphragm structures of silicon micro machined MEMS pressure sensor for operation and measurement of the low-pressure ranges(600mbar). We first show that the conventional arrangement of the Wheatstone bridge resistors realized using the "Flat diaphragms" give rise to large temperature dependence of the offset voltage which affects the sensitivity and linearity of the pressure sensors during operation in the temperatures ranging from-40Cto+80C, thus making the temperature compensation of the sensor output voltage rather tedious and impossible in certain instances. We further demonstrate that, this issue can be circumvented and excellent linearity with minimum dependence of the offset-voltage, sensitivity and linearity can be achieved by using "sculptured diaphragms" with optimized diaphragm dimensions. Towards this goal, in this paper, we present a set of simulation studies involving optimization of the pressure sensor diaphragm dimensions and structures with single and multiple boss structures to achieve better sensitivity, linearity, and at the same time minimize temperature drift, and to achieve better repeatability. © Published under licence by IOP Publishing Ltd.
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    Investigations on the effect of Dual Material Gate work function on DIBL and Subthreshold Swing in Junctionless FinFETs
    (Institute of Electrical and Electronics Engineers Inc., 2020) Mathew, S.; Nithin; Bhat, K.N.; Rao, R.
    This paper investigates the influence of gate material work function on the electrical characteristics as well as short channel effects exhibited by Dual Material Gate-Junctionless FinFETs (DMG-JLFinFETs) with channel length as low as 10 nm. 3D TCAD simulations performed on these devices show that various device parameters like threshold voltage, ON-current, etc, are influenced by the work function difference between the control gate and screen gate material of DMG-JLFinFET. DMG-JLFinFETs exhibit very low Drain Induced Barrier Lowering (DIBL), far lesser than its Single Material Gate (SMG) counterpart. Subthreshold Swing (SS) of DMG devices is higher than SMG devices. The optimal ratio of control gate length to total gate length in DMG-JLFinFET is found to be between 0.5 and 1 for better suppression of short channel effects. © 2020 IEEE.