Soorya, Krishna, K.Pramod, M.Bhat, M.S.2020-03-302020-03-3020102010 5th International Conference on Industrial and Information Systems, ICIIS 2010, 2010, Vol., , pp.255-260https://idr.nitk.ac.in/handle/123456789/8465In this paper, we propose models for single and coupled on-chip global interconnect lines by distributed RLGC parameters using state space approach. Models for single and coupled lines are validated by comparing with SPICE simulations. Interconnect performance metrics are obtained from the proposed models for 65 nm, 90 nm, 130 nm and 180 nm technology nodes based on PTM values. In case of coupled interconnect lines, the effect of mutual inductance and coupling capacitance is considered in addition to the distributed RLGC parameters. The proposed models are generic in nature and illustrated by applying our modeling approach to four coupled interconnect lines. �2010 IEEE.Book chapter