This paper presents a design & implementation methodology for FPGA based MIL-STD-1553 Remote Terminal Sub-System using DDC's BU-61580 device. The interesting part of this paper is that it presents a design of non-processor remote terminal sub-system. The glue logic is put on one FPGA of 176 pins which initializes the BU-61580 in RT mode at power-on. The FPGA design was done using Viewlogic & Actel packages. The simulation has shown the correct results which was then followed by the implementation. In this paper, the design is presented for 9 sensors among which 5 are analog and 4 are digital. For the purpose of testing the circuit, the analog & digital sensors are simulated through the computer.

Bhagyalakshmi, K.Ramachandra, G.Agrawal, V.K.Subbanna Bhat, P.Philar, S.R.2026-02-05Design andJournal of Spacecraft Technology, 1999, 9, 2, pp. 21-329711600https://idr.nitk.ac.in/handle/123456789/280291999Computer simulationError correctionField programmable gate arraysRemote controlSensor data fusionNon-processor remote terminal sub-systemsCommunication satellitesThis paper presents a design & implementation methodology for FPGA based MIL-STD-1553 Remote Terminal Sub-System using DDC's BU-61580 device. The interesting part of this paper is that it presents a design of non-processor remote terminal sub-system. The glue logic is put on one FPGA of 176 pins which initializes the BU-61580 in RT mode at power-on. The FPGA design was done using Viewlogic & Actel packages. The simulation has shown the correct results which was then followed by the implementation. In this paper, the design is presented for 9 sensors among which 5 are analog and 4 are digital. For the purpose of testing the circuit, the analog & digital sensors are simulated through the computer.