Kurian, A.Ramesh Kini, M.2026-02-062023Lecture Notes in Networks and Systems, 2023, Vol.552, , p. 571-58623673370https://doi.org/10.1007/978-981-19-6634-7_40https://idr.nitk.ac.in/handle/123456789/29635The Posit extended RISC-V processor has gained attention as an alternative to its floating point counterpart. However, the Posit compliant RISC-V processor needs further enhancements to be accepted as a standard. In this paper, the shortcomings of existing Posit integration approaches are discussed and a novel approach is put forth wherein, Posit and the floating point arithmetic are incorporated within the core. We also present a comparative study of various Posit integration approaches in terms of resource utilization and timing requirements. Furthermore, to enhance RISC-V processor that supports the concurrent usage of integer, floating point and the Posit arithmetic, a data type casting unit is incorporated. Two data type casting approaches are suggested and compared in terms of speed and the area occupied. Based on the implementation results, inferences are derived on the apt choice of data type casting approach to be undertaken. © 2023, The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.ArithmeticData type castingIEEE-754PositRISC-V