Rai, S.Talawar, B.2026-02-062023Proceedings - 2023 IEEE 30th International Conference on High Performance Computing, Data, and Analytics Workshops, HiPCW 2023, 2023, Vol., , p. 75-https://doi.org/10.1109/HiPCW61695.2023.00021https://idr.nitk.ac.in/handle/123456789/29255Cache replacement techniques designed for conventional DRAM-based memories do not consider the differential miss penalties of different memory technologies. Though replacement policies designed for hybrid memories do consider differential miss penalties of DRAM and NVM, there is less importance given to the content of the cache block. DAIR combines the content of the block with access locality to make the best use of hybrid memories. © 2023 IEEE.