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dc.contributor.authorRahul, T.
dc.contributor.authorSurendra, S.
dc.contributor.authorShivaprasad, S.
dc.date.accessioned2020-03-30T10:22:26Z-
dc.date.available2020-03-30T10:22:26Z-
dc.date.issued2015
dc.identifier.citation2015 International Conference on Industrial Instrumentation and Control, ICIC 2015, 2015, Vol., , pp.1202-1207en_US
dc.identifier.urihttp://idr.nitk.ac.in/jspui/handle/123456789/8580-
dc.description.abstractTo qualify a System-on-Chip (SoC) for automotive standards, all the interfaces have to be thoroughly checked against the specifications/standards. Sensor protocols which are new to the automotive world don't have the complete range of sensors available as of today for checking the complete features. These sensors operate over a limited range, are not capable of generating all possible frame formats, and lack error injection capability. In order to evaluate complete features of this Sensor IPs, sensor protocol has to be emulated. Existing trends consist of emulating the IP on FPGA or by using a waveform generator. Here, the sensor data is generated as per the sensor protocol standard using the Generic Timer Module (GTM) available on the SoC. In this work, we use Infineon's SoC to generate frames using GTM and validate the complete features of sensor interfaces like Single Edge Nibble Transmission (SENT) and Peripheral Sensor Interface (PSI5) present on the same SoC. � 2015 IEEE.en_US
dc.titleNovel architecture for emulation of sensor protocols for complaince checking using Generic Timer Moduleen_US
dc.typeBook chapteren_US
Appears in Collections:2. Conference Papers

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