Please use this identifier to cite or link to this item: https://idr.nitk.ac.in/jspui/handle/123456789/7760
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dc.contributor.authorKasyap, M.S.
dc.contributor.authorKarthikeyan, A.
dc.contributor.authorPerumal, B.V.
dc.contributor.authorNagamani, C.
dc.date.accessioned2020-03-30T10:02:45Z-
dc.date.available2020-03-30T10:02:45Z-
dc.date.issued2017
dc.identifier.citation2016 IEEE 7th Power India International Conference, PIICON 2016, 2017, Vol., , pp.-en_US
dc.identifier.urihttp://idr.nitk.ac.in/jspui/handle/123456789/7760-
dc.description.abstractDVR control requires a robust algorithm for computing grid voltage magnitude and phase angle. Conventional SRF-PLL performs poorly as it cannot filter out negative sequence voltages and harmonics that could occur in the grid voltage. In this paper a Positive and Negative Sequence Extractor (PNSE) is formed by a Delayed Signal Cancellation (DSC) filter, which filters harmonics and extracts Instantaneous Symmetrical Components (ISC) of the source voltage in stationary reference frame. The phase angle information of the grid voltage is derived by computing the unit vectors of the ISC in stationary frame. This eliminates the need for a conventional PLL and thus simplifies the reference generation algorithm. A PI controller tracks the capacitor reference voltage in synchronous reference frame to restore the fundamental load voltage while resonant controllers are tuned to mitigate the lower order odd harmonics in the load voltage. Simulation studies carried out in PSCAD/EMTDC for a Medium Voltage DVR model shows that the presented control works effectively for all the test cases considered such as voltage sags and harmonics. � 2016 IEEE.en_US
dc.titleDSC filter based unit vector estimator for reference generation and control of dynamic voltage restoreren_US
dc.typeBook chapteren_US
Appears in Collections:2. Conference Papers

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