Browsing by Author Talawar, B.

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Issue DateTitleAuthor(s)Supervisor(s)
2018Accurate Performance Analysis of 3D Mesh Network on Chip ArchitecturesHalavar, B.; Talawar, B.-
2018Accurate Power and Latency Analysis of a Through-Silicon Via(TSV)Pasupulety, U.; Halavar, B.; Talawar, B.-
2019Accurate Router Level Estimation of Network-on-Chip Architectures using Learning AlgorithmsKumar, A.; Talawar, B.-
2019Analysis of cache behaviour and software optimizations for faster on-chip network simulationsPrasad, B.M.P.; Parane, K.; Talawar, B.-
2016Analysis of ring topology for NoC architectureKamath, A.; Saxena, G.; Talawar, B.-
2016Cache analysis and software optimizations for faster on-chip network simulationsParane, K.; Prabhu, Prasad, B.M.; Talawar, B.-
2015A Crossbar Interconnection Network in DNATalawar, B.-
2019Design of an adaptive and reliable network on chip router architecture using FPGAParane, K.; Prabhu, Prasad, B.M.; Talawar, B.-
2019Extending BookSim2.0 and HotSpot6.0 for power, performance and thermal evaluation of 3D NoC architecturesHalavar, B.; Pasupulety, U.; Talawar, B.-
2018Floorplan based performance evaluation of 3d variants of mesh and BFT networks-on-chipHalavar, B.; Talawar, B.-
2018FPGA based NoC Simulation Acceleration Framework Supporting Adaptive RoutingParane, K.; Prabhu, Prasad, B.M.; Talawar, B.-
2017GPU implementation of non-local maximum likelihood estimation method for denoising magnetic resonance imagesUpadhya, A.H.K.; Talawar, B.; Rajan, J.-
2019High-performance NoC simulation acceleration framework employing the xilinx DSP48E1 blocksPrabhu, Prasad, B.M.; Parane, K.; Talawar, B.-
2019High-Performance NoCs Employing the DSP48E1 Blocks of the Xilinx FPGAsPrabhu, P.B.M.; Parane, K.; Talawar, B.-
2020LBNoc: Design of low-latency router architecture with lookahead bypass for network-on-chip using FPGAParane, K.; Prabhu, Prasad, B.M.; Talawar, B.-
2018Machine Learning Based Framework to Predict Performance Evaluation of On-Chip NetworksKumar, A.; Talawar, B.-
2019MMAS on GPU for Large TSP InstancesYelmewad, P.; Kumar, A.; Talawar, B.-
2018Near Optimal Solution for Traveling Salesman Problem using GPUYelmewad, P.; Talawar, B.-
2015On the Cache Behavior of SPLASH-2 Benchmarks on ARM and ALPHA Processors in Gem5 Full System SimulatorVikas, B.; Talawar, B.-
2020OP3DBFT: A power and performance optimal 3D BFT NoC architectureHalavar, B.; Talawar, B.-