Browsing by Author Bhat, M.S.

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Issue DateTitleAuthor(s)Supervisor(s)
2013A fourth-order Partial Differential Equation model for multiplicative noise removal in imagesBini, A.A.; Bhat, M.S.-
2015GSM and GUI Based Remote Data Logging SystemKhan, S.R.; Nath, R.K.; Bhat, M.S.-
2014GUI based industrial monitoring and control systemKhan, S.R.; Bhat, M.S.-
2016Handheld electrochemical workstation for serum albumin measurementHebbar, S.; Kumar, V.; Bhat, M.S.; Bhat, N.-
2018High Isolation Single Pole Four Throw RF MEMS Switches for X bandShajahan, E.S.; Bhat, M.S.-
2019High Level Optimization Methodology for High Performance DSP Systems using Retiming TechniquesMehra, H.; Bhat, M.S.-
2006Impact of process variation induced transistor mismatch on sense amplifier performanceRodrigues, S.; Bhat, M.S.-
2010Impedance matching for the reduction of via induced signal reflection in on-chip high speed interconnect linesKrishna, K, S.; Bhat, M.S.-
2018Improved tri-gate FinFET transistor with InGaAsSharma, B.S.; Bhat, M.S.-
2015Inductive Tuned High Isolation RF MEMS Capacitive Shunt SwitchesShajahan, E.S.; Bhat, M.S.; Reddy, B.C.-
2019Library Characterization: Noise and Delay ModelingRaj, R.; Bhat, M.S.; Rekha, S.-
2015Low Energy and Area Efficient Nonbinary Capacitor Array Based SAR ADCJagadish, D.N.; Bhat, M.S.-
2015Low energy and area efficient nonbinary capacitor array based successive approximation register analog-to-digital converterJagadish, D.N.; Bhat, M.S.-
2015A Low Voltage Inverter Based Differential Amplifier for Low Power Switched Capacitor ApplicationsJagadish, D.N.; Bhat, M.S.-
2016A low-energy area-efficient dual channel SAR ADC using common capacitor array techniqueReddy, N.S.; Jagadish, D.N.; Bhat, M.S.-
2012Minimization of via-induced signal reflection in on-chip high speed interconnect linesKrishna, K.S.; Bhat, M.S.-
2014A nonlinear level set model for image deblurring and denoisingBini, A.A.; Bhat, M.S.-
2017A novel dual-gate nano-scale InGaAs transistor with modified substrate geometrySharma, B.S.; Bhat, M.S.-
2017Performance and Reliability Codesign for Superjunction Drain Extended MOS DevicesSomayaji, J.; Kumar, B.S.; Bhat, M.S.; Shrivastava, M.-
2010Performance enhancement in high speed on-chip interconnect linesSoorya, Krishna, K.; Bhat, M.S.-