FPGA Accelerated Track to Track Association and Fusion for ADAS Distributed Sensors

Abstract

The integration and amalgamation of sensor data in the automotive domain play a pivotal role in informing real-time decision-making for advanced driver assistance and safety (ADAS) systems. In a distributed architecture, the track-to-track association (T2TA) modules are responsible for associating the correct track pairs and subsequently fusion modules fuses the information. The T2TA and fusion modules operate within the CPU framework, often leading to elevated latency across the system. This paper introduces digital signal processing (DSP) architectures for the T2TA and fusion modules, designed to meet stringent constraints in terms of both area and latency. These modules encompass critical operations such as matrix inversion, vector-to-matrix multiplications, and matrix-to-matrix multiplications. The challenge of vector-to-matrix multiplications is effectively addressed through the utilization of the constant co-efficient multiplication technique. Additionally, matrix-to-matrix multiplication is performed by employing a vector-to-vector multiplication architecture with Block RAMs (BRAMs). Further-more, matrix inversion is realized through the LU decomposition method. Moreover, this paper presents an innovative approach to expedite the T2TA and fusion modules by harnessing folded DSP architecture within a system-on-chip (SOC) framework. The results of simulations substantiate that the proposed architectures exhibit a remarkable suitability for applications necessitating low area, low power consumption, and high throughput capabilities. © 2023 IEEE.