Design of resolution adaptive TIQ flash ADC using AMS 0.35 ?m technology
| dc.contributor.author | Rajashekar, G. | |
| dc.contributor.author | Bhat, M.S. | |
| dc.date.accessioned | 2026-02-05T09:36:52Z | |
| dc.date.issued | 2009 | |
| dc.description.abstract | This paper presents a resolution adaptive flash A/D converter design and its performance. To achieve high speed, the proposed A/D converter utilises threshold inverter quantisation technique replacing conventional analogue comparators with digital comparators. The replacement results in a faster digital conversion and a reduction of the analogue nodes in the ADC. The proposed ADC is a true variable resolution ADC, operates at 3-bit, 4-bit, 5-bit and 6-bit precision depending on control inputs. The proposed ADC is designed with AMS 0.35 m CMOS technology and 3.3 V power supply voltage and a prototype chip is fabricated. Simulation results and test results are presented. Copyright © 2009, Inderscience Publishers. | |
| dc.identifier.citation | International Journal of Information and Communication Technology, 2009, 2, 46054, pp. 19-30 | |
| dc.identifier.issn | 14666642 | |
| dc.identifier.uri | https://doi.org/10.1504/IJICT.2009.026426 | |
| dc.identifier.uri | https://idr.nitk.ac.in/handle/123456789/27687 | |
| dc.publisher | Inderscience Publishers | |
| dc.subject | Comparator circuits | |
| dc.subject | Comparators (optical) | |
| dc.subject | Analogue to digital converters | |
| dc.subject | CMOS technology | |
| dc.subject | Digital comparators | |
| dc.subject | Digital conversion | |
| dc.subject | FLASH-ADC | |
| dc.subject | Power supply voltage | |
| dc.subject | Quantisation | |
| dc.subject | Variable resolution | |
| dc.subject | Analog to digital conversion | |
| dc.title | Design of resolution adaptive TIQ flash ADC using AMS 0.35 ?m technology |
