Theoretical Analysis of On-Chip Vertical Hybrid Plasmonic Nanograting

Abstract

A complementary metal oxide semiconductor (CMOS) compatible photonic-plasmonic waveguide with nanoscale dimensions and better optical confinement has been proposed for the infrared (IR)–band applications. The design is based on the multi-layer hybrid plasmonic waveguide (Si–SiO<inf>2</inf>–Au) structure. The 3D-finite element method (FEM)–based numerical simulations of single slot hybrid plasmonic waveguide (HPWG) confirms 2.5 dB/cm propagation loss and 15 μm−2 confined intensity. Moreover, its application as dual-slot nanograting is studied with higher propagation length and ultra–low–dispersion near the 1550–nm wavelength. The proposed low-dispersion nanoscale grating design is suitable for future lab–on–chip nanophotonic integrated circuits. © 2021, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.