Design and Implementation of Transformer-Based Multilevel Inverter Topology with Reduced Components

dc.contributor.authorBehara, S.
dc.contributor.authorSandeep, N.
dc.contributor.authorYaragatti, U.R.
dc.date.accessioned2026-02-05T09:31:05Z
dc.date.issued2018
dc.description.abstractThis paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. © 1972-2012 IEEE.
dc.identifier.citationIEEE Transactions on Industry Applications, 2018, 54, 5, pp. 4632-4639
dc.identifier.issn939994
dc.identifier.urihttps://doi.org/10.1109/TIA.2018.2836911
dc.identifier.urihttps://idr.nitk.ac.in/handle/123456789/25030
dc.publisherInstitute of Electrical and Electronics Engineers Inc.
dc.subjectBoolean algebra
dc.subjectBridge circuits
dc.subjectCapacitors
dc.subjectElectric inverters
dc.subjectElectric transformers
dc.subjectElectric windings
dc.subjectPower quality
dc.subjectPulse width modulation
dc.subjectSwitches
dc.subjectVoltage control
dc.subjectComprehensive costs
dc.subjectDesign and implementations
dc.subjectMultilevel inverter
dc.subjectMultilevel inverter topology
dc.subjectPrototypes
dc.subjectSingle dc source
dc.subjectSingle-phase transformers
dc.subjectVoltage levels
dc.subjectTopology
dc.titleDesign and Implementation of Transformer-Based Multilevel Inverter Topology with Reduced Components

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