Voltage regulator module design considerations to enhance efficiency

Abstract

The shrinking chip fabrication technologies reduces the power consumption and enhances the clock speeds of processors. Accordingly the new generation processors are expected to work below 1V voltage profiles. The power supply designers are expected to deliver acceptable solutions with constraints like low voltage at large current, ripples below 2%, good transient response with high load slew rates etc. Few more constraints like small foot print, low cost and higher efficiency to meet the green energy initiatives, leaves very few options for designers. Keeping in view the decreasing voltage requirements of future processors, this paper proposes a loss minimization approach. This paper suggests a technique to select optimum switching frequency to maximize the power supply efficiency under all its operating conditions. The paper uses the steady state analysis of the converter to show the suitability of the solution as a cost effective approach. ©2010 IEEE.