Design and implementation of novel multilevel inverter with full DC-utilization
| dc.contributor.author | Nageswar Rao, B. | |
| dc.contributor.author | Yellasiri, Y. | |
| dc.contributor.author | Aditya, K. | |
| dc.contributor.author | Shiva Naik, B.S. | |
| dc.contributor.author | Karunakaran, E. | |
| dc.date.accessioned | 2026-02-03T13:20:29Z | |
| dc.date.issued | 2025 | |
| dc.description.abstract | This paper presents a novel single-source transformer-based nine-level (9 L) inverter configuration. The design incorporates a three-level neutral-point-clamped (3 L NPC) inverter, a 3-L full bridge, and a transformer to produce 9 L output voltage levels. In particular, one of the 2 L legs in the full bridge is common among the transformer and the load. The proposed structure minimises the components compared to existing transformer-based nine-level inverters. Thus, the suggested inverter volume, cost, and complexity are minimised. Furthermore, a pulse width modulation method has been developed to generate the necessary gating pulses for the proposed inverter. Additionally, a complete comparison study illustrates the enhanced performance of the suggested architecture. The validity of the suggested 9 L inverter is assessed by performing MATLAB simulations and using a scaled prototype. The results obtained from the simulations and experimental tests are then presented and analysed. A clear correlation was observed between the simulation and the hardware results. © 2024 Informa UK Limited, trading as Taylor & Francis Group. | |
| dc.identifier.citation | International Journal of Electronics, 2025, 112, 6, pp. 1212-1231 | |
| dc.identifier.issn | 207217 | |
| dc.identifier.uri | https://doi.org/10.1080/00207217.2024.2370904 | |
| dc.identifier.uri | https://idr.nitk.ac.in/handle/123456789/20546 | |
| dc.publisher | Taylor and Francis Ltd. | |
| dc.subject | Bridges | |
| dc.subject | DC transformers | |
| dc.subject | Electric inverters | |
| dc.subject | MATLAB | |
| dc.subject | Design and implementations | |
| dc.subject | Full bridge | |
| dc.subject | Inverte | |
| dc.subject | Multi Level Inverter (MLI) | |
| dc.subject | Output voltages | |
| dc.subject | PWM inverter | |
| dc.subject | Single source | |
| dc.subject | Three-level neutral point clamped | |
| dc.subject | Transformer | |
| dc.subject | Voltage levels | |
| dc.subject | Pulse width modulation | |
| dc.title | Design and implementation of novel multilevel inverter with full DC-utilization |
