Design of Dual-Material Gate Junctionless FinFET based on the Properties of Materials Forming Gate Electrode

Abstract

This work elaborately investigates the electrical behaviour and short channel performance of Dual-Material Gate Junctionless Fin Field Effect Transistors (DMG-JLFinFETs) with multiple-gate metal pairs and varying gate metal length ratios. Rigorous analysis on the nature of DMG-JLFinFET with gate length as low as 10 nm is done using a device simulator by Silvaco, Inc. The gate material closer to the source, namely M1, has a dominating influence on the threshold voltage (V<inf>th</inf>) and tunnelling current (I<inf>tunn</inf>) than the gate material closer to the drain (named M2) in a DMG-JLFinFET. I<inf>tunn</inf> is lower when the work function of M1 (Φ<inf>M1</inf>) is greater than the work function of M2 (Φ<inf>M2</inf>). The relative change in threshold voltage is minimum for Platinum–Gold (PtAu)-DMG-JLFinFET (0.68%). Titanium–Aluminium (TiAl) and Nickel–Titanium (NiTi) gate material pairs, having the same work function difference of 0.38 eV, have the least Drain-Induced Barrier Lowering (DIBL) of 12.88 mV/V. A better Sub-threshold Swing (SS) is observed for DMG-JLFinFET having Φ<inf>M1</inf> < Φ<inf>M2</inf>. For devices with Φ<inf>M1</inf> > Φ<inf>M2</inf>, SS can be improved by making a length of M1 (L<inf>M1</inf>) greater than 70% of the total gate length (L<inf>g</inf>). © 2024 IETE.