Design of high performance dual-gate nano-scale In0.55Ga0.45 as transistor with modified substrate geometry

dc.contributor.authorSharma, B.S.
dc.contributor.authorBhat, M.S.
dc.date.accessioned2026-02-06T06:38:43Z
dc.date.issued2017
dc.description.abstractStructures based on Indium Gallium Arsenide (InGaAs) have attracted a lot of attention in Metal Oxide Semiconductor Field Effect Transistor (MOSFET) technology, recently. In this paper, we investigate the performance of a nano scale dual-gate MOSFET using InGaAs, and propose the design of a high performance In<inf>0.55</inf>Ga<inf>0.45</inf>As transistor with modified substrate geometry. Impact of changing the mole-fraction 'x' in In<inf>1-x</inf>Ga<inf>x</inf>As on the device performance is observed. To achieve best performance, the device geometry, relative mole fraction of In & Ga, the doping concentration of source/drain region and channel stop implant are varied. Simulations are performed to obtain output and transfer characteristics considering a N+ poly gate as well as a metallic (Al) gate for the proposed device. Simulations show excellent subthreshold slope (~ 62mV/dec), DIBL (~ 30 m V/V) and I<inf>ON</inf>/I<inf>OFF</inf> = 2.23 × 106 values. As an application, an inverter is designed using this device and its DC and Transient responses for resistive and saturated enhancement NMOS load are plotted. © 2017 IEEE.
dc.identifier.citation2017 IEEE 8th Annual Ubiquitous Computing, Electronics and Mobile Communication Conference, UEMCON 2017, 2017, Vol.2018-January, , p. 271-277
dc.identifier.urihttps://doi.org/10.1109/UEMCON.2017.8249045
dc.identifier.urihttps://idr.nitk.ac.in/handle/123456789/31834
dc.publisherInstitute of Electrical and Electronics Engineers Inc.
dc.subjectDouble-gate MOSFET
dc.subjectInGaAs MOSFET
dc.subjectNano InGaAs Device
dc.titleDesign of high performance dual-gate nano-scale In0.55Ga0.45 as transistor with modified substrate geometry

Files