A novel nine-level inverter with reduced component count using common leg configuration

dc.contributor.authorNageswar Rao, B.
dc.contributor.authorYellasiri, Y.
dc.contributor.authorShiva Naik, B.S.
dc.contributor.authorAditya, K.
dc.date.accessioned2026-02-04T12:26:23Z
dc.date.issued2023
dc.description.abstractThis article proposes a nine-level (9 L) inverter with a common leg configuration employing transformers and a single dc source. The suggested inverter uses eight switches and two transformers to produce 9 L output voltage. The suggested circuit minimizes the switches and transformers compared with existing transformer-based multilevel inverters (TMLI). Therefore, the proposed circuit cost, volume and complexity are also reduced. Additionally, a thorough comparison with the various 9 L inverter circuits is conducted to ensure the benefits of the suggested TMLI. A basic logic gate-based pulse width modulation (PWM) is implemented for the suggested 9 L inverter. Simulation and hardware studies verifying the feasibility and proficiency of the suggested inverter are performed. © 2023, The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature.
dc.identifier.citationElectrical Engineering, 2023, 105, 4, pp. 2007-2019
dc.identifier.issn9487921
dc.identifier.urihttps://doi.org/10.1007/s00202-023-01786-7
dc.identifier.urihttps://idr.nitk.ac.in/handle/123456789/21813
dc.publisherSpringer Science and Business Media Deutschland GmbH
dc.subjectDC transformers
dc.subjectElectric inverters
dc.subjectBasic logic gates
dc.subjectComponent count
dc.subjectInverte
dc.subjectInverter circuit
dc.subjectMultilevel systems
dc.subjectMultilevels
dc.subjectOutput voltages
dc.subjectPulse width modulation inverters
dc.subjectSingle dc source
dc.subjectTransformer
dc.subjectPulse width modulation
dc.titleA novel nine-level inverter with reduced component count using common leg configuration

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