Speech synthesizer with speculative multithreading and speculative computation reuse

Abstract

Speculative multithreading and speculative computation reuse uses profiles for exploiting and to increase the cache memory performance. Currently proposed multithreaded processors try to improve on execution of number of instructions in each clock cycle. Even the general purpose applications can enchance the Instruction level parallelism through these techniques. Hence in this paper we are proposing an idea of the hybrid technique of both multithreading and instruction reuse to enhance the performance and execution rate comparatively with the sequential computation. We are also computing the thread interval for the reliability testing such that at what interval the value to be passed from the producer thread to the consumer thread. © 2013 IEEE.