EFH - An Efficient Fault-Tolerant Routing Methodology for 2D Mesh NoCs
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Date
2025
Journal Title
Journal ISSN
Volume Title
Publisher
Institute of Electrical and Electronics Engineers Inc.
Abstract
The increasing complexity of modern System-on-Chip (SoC) designs demands reliable and scalable communication frameworks. Network-on-Chip (NoC) architectures, particularly the 2D Mesh topology, have gained prominence due to their structured layout and scalability, facilitating efficient data routing among interconnected functional blocks. However, the 2D Mesh topology remains highly vulnerable to static and dynamic faults, which disrupt network performance and increase congestion. Existing fault-tolerant routing algorithms struggle with handling complex fault patterns, such as concave and irregular fault regions, leading to increased latency and packet loss. This paper introduces the Entrance, First, Hole (EFH) routing methodology, which employs a dynamic node-labeling strategy to classify nodes into entrance, first, and hole nodes. This classification enables the network to bypass faults, maintain functional nodes, and optimize routing paths without introducing significant overhead. Experimental results using the Noxim NoC simulator demonstrate that EFH significantly enhances network throughput, reduces latency, and improves overall fault resilience compared to existing approaches. © 2025 IEEE.
Description
Keywords
2D Mesh, EFH Routing, Fault-Tolerance, Network-on-Chip, Routing Strategy, Throughput
Citation
2025 IEEE 9th International Test Conference India, ITC India 2025, 2025, Vol., , p. -
