Technology driven high-level synthesis

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dc.contributor.authorJoseph, M.
dc.contributor.authorBhat, N.B.
dc.contributor.authorSekaran, K.C.
dc.date.accessioned2020-03-30T09:46:05Z
dc.date.available2020-03-30T09:46:05Z
dc.date.issued2007
dc.description.abstractTechnology driven High-Level Synthesis make the present High-Level Synthesis knowledgeable of the target Field Programmable Gate Array. All the functions of High-Level Synthesis become aware of target technology since parsing. It makes right inference of hardware, by attaching target technology specific attributes to the parse tree. This right inference will guide to generate optimized hardware. � 2007 IEEE.en_US
dc.identifier.citationProceedings of the 15th International Conference on Advanced Computing and Communications, ADCOM 2007, 2007, Vol., , pp.485-490en_US
dc.identifier.urihttps://idr.nitk.ac.in/handle/123456789/6754
dc.titleTechnology driven high-level synthesisen_US
dc.typeBook chapteren_US

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