Ripple Current Reduction of Double-Gain SEPIC Converter Using Coupled Inductor
| dc.contributor.author | Diwakar Naik, M.D. | |
| dc.contributor.author | Vinatha Urundady, U. | |
| dc.date.accessioned | 2026-02-06T06:35:17Z | |
| dc.date.issued | 2022 | |
| dc.description.abstract | In this paper Input current ripple reduction technique of a Double-Gain SEPIC (DGSEPIC) converter using Coupled Inductor (CI) is proposed. This converter can provide buck-boost non-inverting output voltage by maintaining continuous input current. The voltage gain of this converter is twice that of a conventional SEPIC converter, so this converter is capable of providing a wide range of output voltage variations by changing the converter's duty cycle. The input ripple current of the converter is reduced using CI, which eliminates the use of a high-rating filter circuit at the input side of the converter. This converter needs a single switch and a few additional inductors and capacitors to obtain twice the voltage gain. Since the converter has only one switch, the complexity of the controller design is less. A PI (Proportional and Integral) controller with Pulse Width Modulation (PWM) technique is used to control the gate pulses of the converter. The simulation of the converter is done using MATLAB/Simulink software, and the results of the Double gain SEPIC converter with CI are presented. © 2022 IEEE. | |
| dc.identifier.citation | 10th IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2022, 2022, Vol., , p. - | |
| dc.identifier.uri | https://doi.org/10.1109/PEDES56012.2022.10080034 | |
| dc.identifier.uri | https://idr.nitk.ac.in/handle/123456789/29760 | |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | |
| dc.subject | Coupled Inductor | |
| dc.subject | Double Gain SEPIC Converter | |
| dc.subject | input current ripple | |
| dc.subject | PWM | |
| dc.title | Ripple Current Reduction of Double-Gain SEPIC Converter Using Coupled Inductor |
