Challenges in Design, Data Placement, Migration and Power-Performance Trade-offs in DRAM-NVM-based Hybrid Memory Systems

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dc.contributor.authorRai, S.
dc.contributor.authorTalawar, B.
dc.date.accessioned2026-02-08T18:38:38Z
dc.date.issued2023
dc.description.abstractDRAM-NVM-based hybrid memory opens up a varied range of power-performance-area operational configurations through page migration between the high-performance DRAM and the reliable NVM. The amalgamation of two technologies requires various modifications for the existing monolithic DRAM-based systems. This paper summarizes the current research work in the areas of data placement and page migration in hybrid memories. The challenges and design solutions from a range of NVMs-PCM, STT-RAM, ReRAM is presented. This paper also identifies several research challenges in these areas. © 2023 IETE.
dc.identifier.citationIETE Technical Review (Institution of Electronics and Telecommunication Engineers, India), 2023, Vol.40, 4, p.498 -520
dc.identifier.issn2564602
dc.identifier.urihttps://doi.org/10.1080/02564602.2022.2127945
dc.identifier.urihttps://idr.nitk.ac.in/handle/123456789/34279
dc.publisherTaylor and Francis Ltd.
dc.subjectDRAM
dc.subjectHybrid memory
dc.subjectMigration
dc.subjectNVM
dc.subjectPerformance
dc.subjectPower
dc.titleChallenges in Design, Data Placement, Migration and Power-Performance Trade-offs in DRAM-NVM-based Hybrid Memory Systems

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