A Novel Zero Blind Zone Phase Frequency Detector for Fast Acquisition in Phase Locked Loops

dc.contributor.authorKuncham, S.S.
dc.contributor.authorGadiyar, M.
dc.contributor.authorSushmitha Din, K.
dc.contributor.authorLad, K.K.
dc.contributor.authorLaxminidhi, L.
dc.date.accessioned2026-02-06T06:38:16Z
dc.date.issued2018
dc.description.abstractThe inability to sense the transitions in the input by conventional phase frequency detector (PFD) during the reset operation leads to blind zone, which reduces the acquisition speed and the detection range. The pull down network in proposed design is modified so as to eliminate the reset pulse for phase difference beyond the dead zone in order to have a full detection range and less cycle slippage. As the design gives the right polarity for phase differences close to ±2π, the acquisition time is reduced substantially. The Transfer characteristic of the PFD manifests an identical response. The PFD design is implemented in 180nm CMOS technology and consumes 1.36mW at an operating frequency of 1GHz. © 2018 IEEE.
dc.identifier.citationProceedings of the IEEE International Conference on VLSI Design, 2018, Vol.2018-January, , p. 167-170
dc.identifier.issn10639667
dc.identifier.urihttps://doi.org/10.1109/VLSID.2018.56
dc.identifier.urihttps://idr.nitk.ac.in/handle/123456789/31550
dc.publisherIEEE Computer Society help@computer.org
dc.subjectBlind zone
dc.subjectCycle slippage
dc.subjectDead zone
dc.subjectPFD
dc.subjectPLL
dc.titleA Novel Zero Blind Zone Phase Frequency Detector for Fast Acquisition in Phase Locked Loops

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