Speech synthesizer with speculative multithreading and speculative computation reuse

dc.contributor.authorSuma, S.
dc.contributor.authorGopalan, N.P.
dc.date.accessioned2020-03-30T09:45:55Z
dc.date.available2020-03-30T09:45:55Z
dc.date.issued2013
dc.description.abstractSpeculative multithreading and speculative computation reuse uses profiles for exploiting and to increase the cache memory performance. Currently proposed multithreaded processors try to improve on execution of number of instructions in each clock cycle. Even the general purpose applications can enchance the Instruction level parallelism through these techniques. Hence in this paper we are proposing an idea of the hybrid technique of both multithreading and instruction reuse to enhance the performance and execution rate comparatively with the sequential computation. We are also computing the thread interval for the reliability testing such that at what interval the value to be passed from the producer thread to the consumer thread. � 2013 IEEE.en_US
dc.identifier.citation2013 15th International Conference on Advanced Computing Technologies, ICACT 2013, 2013, Vol., , pp.-en_US
dc.identifier.urihttps://idr.nitk.ac.in/handle/123456789/6617
dc.titleSpeech synthesizer with speculative multithreading and speculative computation reuseen_US
dc.typeBook chapteren_US

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