Faculty Publications

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    Single-phase seven-level grid-connected photovoltaic system with ripple correlation control maximum power point tracking
    (International Journal of Renewable Energy Research, 2016) Sandeep, N.; Yaragatti, R.Y.
    This paper puts forward a control scheme for single-phase photovoltaic (PV) fed grid connected with cascade Hbridge (CHB) inverter. A unique control strategy based on the voltage ratio is proposed and is embedded with ripple correlation control (RCC) based maximum power point tracking (MPPT) to ensure the efficient energy conversion. The control scheme employed enables the independent operation and control of individual DC link voltage, ensuring the extraction of maximum power available from each PV panel. In addition, low harmonic grid currents are generated with an arbitrary power factor. Independent control of active and reactive power is exercised by decoupled component method. Numerical simulation was performed using the MATLAB/SIMULINK platform and results for three H-bridge cells connected in series are presented to support the theoretical concepts and control scheme proposed.
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    Operation and Control of a Nine-Level Modified ANPC Inverter Topology with Reduced Part Count for Grid-Connected Applications
    (Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.
    This paper presents a nine-level active-neutral-point-clamped (ANPC) based multilevel inverter (MLI) topology for grid-connected applications requiring only ten switches. The envisaged structure comprises two parts, namely five-level ANPC unit, and a two-level converter leg whose midpoint is used as another ac terminal. An ad hoc switching state redundancy based modulation strategy is used to ensure that the voltage across the flying capacitor is tightly balanced and is implemented using a look-up table further simplifies the control complexity. The performance and effectiveness of the proposed topology with its control scheme are validated through simulations and experimental tests. Comparison with other MLIs is included to highlight the merits of the proposed topology. From the results, it will be shown that the proposed inverter requires the least part count as compared to other topologies with the same performance and output quality. © 1982-2012 IEEE.
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    A Switched-Capacitor-Based Multilevel Inverter Topology with Reduced Components
    (Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.
    This letter presents an improved sensorless nine-level inverter topology with reduced number of components. It is formed by cascading a three-level T-Type neutral clamped point inverter with a floating capacitor (FC) fed two-level converter unit. Additionally, two line-frequency switches are appended across the dc-link. A simple logic-form equations-based pulse width modulator is designed which is in-charge of maintaining the FC voltage at its reference value without any aid of voltage and current sensor. Thus, the complexity in control of the proposed topology is very minimal. The working principle of the proposed inverter and formulation of logic-form equations is deliberated in detail. Furthermore, experimental results obtained from the developed prototype are presented to validate feasibility and operability of the proposed topology. Finally, a comprehensive comparison with some of the recently reported inverter topologies proving the merits of the proposed topology is included. © 1986-2012 IEEE.
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    Design and development of a novel 19-level inverter using an effective fundamental switching strategy
    (Institute of Electrical and Electronics Engineers Inc., 2018) Venkataramanaiah, J.; Yellasiri, Y.; Panda, A.K.
    This paper presents a single-phase 19-level inverter with fewer switching components, leading to reducing the cost and enhancing reliability for renewable applications. The anticipated multilevel inverter has two bridges that generate quasi-square and seven-level uneven waveforms with equal magnitude steps. Two voltage waveforms are cascaded at secondary side of transformers to create the 19-level output voltage waveform. Furthermore, to find the appropriate switching instants of the proposed configuration, a new fundamental switching method called the fundamental sine quantized switching technique is presented. In fact, it has the capacity to provide the N number of switching instants with less computational efforts, and attain optimized total harmonic distortion in the output voltage. Finally, performance of the proposed topology is validated with simulations and a hardware setup. © 2013 IEEE.
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    A Self-Balancing Five-Level Boosting Inverter with Reduced Components
    (Institute of Electrical and Electronics Engineers Inc., 2019) Sandeep, N.; Jagabar Sathik, J.S.; Yaragatti, U.R.; Krishnasamy, K.
    Two-Stage boosting multilevel inverters (MLIs), which are highly suitable for photovoltaic power plants, are known to suffer because of the high voltage stress on the switches of second stage. One of the ways to confront this issue is through eliminating the front-end booster. However, this leads to increased structural and control complexity of the resulting integrated boosting MLI. This letter presents a single-stage boosting MLI requiring lesser number of switches, diodes, and capacitors for renewable power generation applications. It requires nine switches and only one capacitor for five-level voltage generation. The topology has inherent self-balancing capability, thereby does not need additional balancing circuitry. The proposed topology has a uniform peak inverse voltage stress on the switches of value equal to the input dc voltage. A less complicated logic-form-equations-based gating pulse generation scheme is designed for enabling the proposed MLI to maintain its capacitor voltage. Further, a comparative study with state-of-the-art topologies is carried out to demonstrate the superior performance of the proposed topology. Finally, the feasibility of the proposed topology is validated through experimental tests and the corresponding results are elucidated. © 1986-2012 IEEE.
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    Switched-Capacitor-Based Quadruple-Boost Nine-Level Inverter
    (Institute of Electrical and Electronics Engineers Inc., 2019) Sandeep, N.; Jagabar Sathik, J.S.; Yaragatti, U.R.; Krishnasamy, K.
    This letter describes a novel nine-level inverter based on switched capacitors (SCs) with quadruple-boost ability requiring reduced components. The structure of the proposed topology relies on the series/parallel connection of SCs. It consists of 12 switches and two SCs. As opposed to similar SC-based inverters, the proposed topology does not employ a back-end H-bridge and the voltage stress of all the switches does not exceed twice the input dc voltage. A simple logic-gate-based pulsewidth-modulation scheme is developed for gating the switches of the proposed topology. A comprehensive comparison against the state-of-the-art topologies in terms of the required number of components is performed to attest the outperforming merits of the proposed topology. Finally, various experimental results are presented to validate the feasibility and operability of the proposed topology. © 1986-2012 IEEE.
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    A Hybrid Nine-Level Inverter Topology with Boosting Capability and Reduced Component Count
    (Institute of Electrical and Electronics Engineers Inc., 2021) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.
    Nowadays, output voltage boosting gain property along with curtailment in the circuit voltage stress, and component count are considered as the essential topological features for the new multilevel inverter (MLI) circuits. Recognizing the above, a hybrid nine-level inverter topology (HNIT) for DC-AC conversion is proposed in this brief. Each phase of the HNIT is designed with only eight semiconductor switches, one diode, and two electrolytic capacitors. Herein, series-parallel and conventional-series techniques are utilized effectively to balance the capacitor voltages. Further, cost and quantitative comparisons are carried among the state-of-art circuits to highlight the supremacy of proposed circuit. Subsequently, the performance of HNIT is verified experimentally with the fundamental switching PWM technique at different load conditions. © 2004-2012 IEEE.
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    Modified Selective Harmonics Mitigation PWM for a Switched Diode Multilevel Inverter
    (IOP Publishing Ltd, 2021) Sahaya Ponrekha, A.; Jagabar Sathik, J.; Lakshmanan, P.; Singh, J.; Mani, L.; Mandal, A.; Madhavan, J.
    A modified selective harmonic mitigation (SHM) technique for multilevel inverters considering the RMS output voltage magnitude is presented. The harmonic contents in the output voltage of these inverters must satisfy the specified grid code requirement standards. In conventional SHM techniques, the firing angles of the multilevel inverters have been derived by taking into account grid code harmonic reduction standards. When the multi-level inverters are driven with these firing pulses generated, it results in reduction of the magnitude of the inverter output voltage. In order to overcome this issue of output voltage reduction, the modified SHM optimization problem includes another constraint on the RMS output voltage limits, which results in different set of firing angles. This facilitates the use of firing angles, which takes into account the grid code standards of harmonic mitigation without compromising the value of the RMS output voltage of the inverters. The proposal has been simulated and validated in MATLAB Simulink and the experimental results are obtained for a single-phase seven level inverter with Silicon made semiconductor switches. By using the proposed method, output voltage THD (upto 40th harmonics were considered) of 5.9% was obtained, which is well below the harmonic standards specified by EN 50160. © 2021 The Electrochemical Society ("ECS"). Published on behalf of ECS by IOP Publishing Limited.
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    A novel nine-level boost inverter with a low component count for electric vehicle applications
    (John Wiley and Sons Ltd, 2021) Shiva Naik, B.S.; Yellasiri, Y.; Aditya, K.; Nageswar Rao, B.N.
    In electric vehicles (EVs), considerable battery cells are cascaded in series for motor driving to improve the output voltage. The series combination of battery cells causes challenges like isolation of faulty cells, voltage unbalance, and slow charge equalization. Therefore, state-of-charge (SOC) and voltage equalization circuits are often used in industries to protect the battery cells. A nine-level inverter circuit with a double voltage boost is proposed to reduce the above issues based on the switch-capacitor (SC) principle. Unique features like self-balancing, voltage boosting are attained, which cannot be achieved through traditional inverters. The proposed topology can operate at a wide range of modulation indices ((Formula presented.)) to produce different voltage levels. The absence of a back-end H-bridge in the proposed circuit offers low voltage stress across the semiconductors. The operating principle, capacitor sizing, and modulation approach are presented. Further, experimental tests are conducted at different loading conditions to verify the performance of the proposed circuit. © 2021 John Wiley & Sons Ltd.
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    A novel single source multilevel inverter with hybrid switching technique
    (John Wiley and Sons Ltd, 2022) Nageswar Rao, B.; Yellasiri, Y.; Shiva Naik, B.; Venkataramanaiah, J.; Aditya, K.; Panda, A.
    A novel multilevel inverter (MLI) configuration with the hybrid switching technique is presented in this paper. The proposed MLI consists of the H-bridge combination with unidirectional switches, half-bridges, and transformers. The suggested MLI with the additional cascaded connection increases to higher voltage levels. The number of employed components in this topology is drastically minimized. Therefore, the complexity, cost, and volume of the proposed topology are also reduced. The operation of the suggested topology is tested through the improved novel switching technique. This modulation method reduces the total harmonic distortion (THD) and produces high root mean square (RMS) voltage. Further, a comprehensive comparison with the recent MLI topologies is performed to validate the merits of the suggested inverter. Simulation and experimental results verify the suggested topology performance using the new modulation technique at different loading conditions and modulation indices. © 2021 John Wiley & Sons, Ltd.