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    Ripple Current Reduction of Double-Gain SEPIC Converter Using Coupled Inductor
    (Institute of Electrical and Electronics Engineers Inc., 2022) Diwakar Naik, M.D.; Vinatha Urundady, U.
    In this paper Input current ripple reduction technique of a Double-Gain SEPIC (DGSEPIC) converter using Coupled Inductor (CI) is proposed. This converter can provide buck-boost non-inverting output voltage by maintaining continuous input current. The voltage gain of this converter is twice that of a conventional SEPIC converter, so this converter is capable of providing a wide range of output voltage variations by changing the converter's duty cycle. The input ripple current of the converter is reduced using CI, which eliminates the use of a high-rating filter circuit at the input side of the converter. This converter needs a single switch and a few additional inductors and capacitors to obtain twice the voltage gain. Since the converter has only one switch, the complexity of the controller design is less. A PI (Proportional and Integral) controller with Pulse Width Modulation (PWM) technique is used to control the gate pulses of the converter. The simulation of the converter is done using MATLAB/Simulink software, and the results of the Double gain SEPIC converter with CI are presented. © 2022 IEEE.