Faculty Publications

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    Modeling and analysis of deadlock driven dynamic priority scheduling
    (2013) Hazra, R.; Kanjilal, A.; Dey, S.; Bhattacharya, S.
    Specifying and designing Real Time Software Systems (RTSS) is a complex matter, because it requires logical correctness as well as timing correctness. Unified Modeling Language (UML), the standard visual object-oriented modeling language, is suitable to deal with this complexity. In RTSS, scheduling of tasks with hard deadlines has been an important area of research in today's life. In this paper a model is developed using UML 2.0 to highlight the deadlock occurrence as a drawback of Priority Inheritance Protocol (PIP). Further an improved model has been developed to prevent deadlock using the Stack Based Preemption Ceiling Protocol (SBPCP). © 2013 IEEE.
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    Petri Net-Based Verification of Adaptive Traffic Light Control with AIMD Algorithm
    (Institute of Electrical and Electronics Engineers Inc., 2024) Prasanna, S.; Gulati, A.; Anagha, H.C.; Prabhu, A.; Das, M.; Mohan, B.R.
    This paper introduces and analyses the performance of the Petri net model created to simulate a traffic control system using the Additive Increase Multiplicative Decrease (AIMD) algorithm. The Petri net model was designed using TimeNET [1] tool. The model was evaluated by analysing the Reachability Graph generated by a Depth First Search (DFS) and Backtracking based algorithm. Several criteria such as Stability, Boundedness, Deadlock, etc. were verified by our proposed algorithm. The model was then validated through a C++ code to ensure it performs correctly under different situations. All the related code, images, and tables used in this paper can be found at GitHub 1 © 2024 IEEE.