Faculty Publications
Permanent URI for this communityhttps://idr.nitk.ac.in/handle/123456789/18736
Publications by NITK Faculty
Browse
7 results
Search Results
Item Simplified transformer-based multilevel inverter topology and generalisations for renewable energy applications(Institution of Engineering and Technology journals@theiet.org, 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.Multilevel inverters (MLIs) generating high-quality voltage waveforms are playing a significant role in renewable energy applications. However, the requirement of higher number of power devices, complex pulse-width-modulation (PWM) and voltage unbalancing issues are the impediments associated with their direct usage. Consequently, several attempts to devise MLIs with lesser number of overall components are witnessed. This study focuses on developing a nine-level inverter comprising of a single transformer and reduced component count. An optimisation of the number of transformers and their turn's ratio for a given number of voltage levels resulting in the least number of switches is investigated and deliberated in detail. Besides, an uncomplicated logic gate-based PWM strategy is developed for generating the gating signals of switches using simple Boolean logic relations. A detailed comparison with other recommended MLI topologies is presented to highlight the notable features of the proposed topology. Simulation results obtained using the model developed in MATLAB/Simulink along with the experimental measurements obtained from a downscale prototype is presented to validate the practicability, effectiveness, and viability of the proposed topology. An explicit agreement among the simulation and experimental results is observed. © The Institution of Engineering and Technology 2017.Item Novel active clamped Y-source network for improved voltage boosting(Institution of Engineering and Technology JBristow@theiet.org, 2019) Reddivari, R.; Jena, D.Y-source impedance networks are one of the prominent two-port networks for DC–DC and DC–AC applications with the higher boosting ability and reduced stress across the switching elements. However, the boosting ability of the Y-source converter needs better magnetic coupling between the windings. The loosely coupled inductors cause high-voltage spikes and poor voltage regulation. Use of highly rated switches or incorporation of the proper clamping circuit is essential to improve the performance Y-source converter. It is always better to go with clamping/absorbing circuits instead of the selection of highly rated devices. Various passive and active clamping/absorbing circuits are introduced in literature to suppress the voltage spikes at the expense of higher component count. This article proposes a novel active clamped Y-source impedance network and its family by adding one additional clamping diode to the existing type-I improved Y-source network. Compared to other Y-source networks, the proposed networks absorb the voltage spikes with reduced passive component count and re-utilise the absorbed energy to enhance the voltage gain in the presence of leakage inductance and winding equivalent series resistance. Finally, one of the proposed impedance networks, i.e. an active clamped Y-source DC–DC converter, has been verified experimentally using a ferrite core. © The Institution of Engineering and Technology 2019.Item Analysis, Design, and Performance Evaluation of Differential-Mode Y-Source Converters for Voltage Spikes Mitigation(Institute of Electrical and Electronics Engineers Inc., 2020) Reddivari, R.; Jena, D.; Gautham, G.Impedance source converters (ISC) based on the magnetic coupling can enhance their voltage gains by maintaining lower shoot-through duty ratios and reduced passive component count. However, the nonzero leakage inductance in the practical ISC generates high switching voltage spikes resulting in poor voltage regulation. Therefore, an absorbing circuit with additional components is crucial to reduce these voltage spikes and to absorb the energy stored in leakage inductances. This article presents a family of differential-mode Y-source converters (DMYSCs) as an alternative to the latest Y-source converter that mitigates the switching voltage spikes without increasing the number of components. The proposed converters DMYSC-I, DMYSC-II, and improved ?-type Y-source converter are derived from the original Y-source impedance network by altering the winding orientation. In this article, the respective topologies with their working principles are studied and the characteristics are compared with other Y-source converters. Simulation and experimental results have confirmed the abilities of the proposed converters to mitigate their switching voltage spikes. © 1972-2012 IEEE.Item A Hybrid Nine-Level Inverter Topology with Boosting Capability and Reduced Component Count(Institute of Electrical and Electronics Engineers Inc., 2021) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.Nowadays, output voltage boosting gain property along with curtailment in the circuit voltage stress, and component count are considered as the essential topological features for the new multilevel inverter (MLI) circuits. Recognizing the above, a hybrid nine-level inverter topology (HNIT) for DC-AC conversion is proposed in this brief. Each phase of the HNIT is designed with only eight semiconductor switches, one diode, and two electrolytic capacitors. Herein, series-parallel and conventional-series techniques are utilized effectively to balance the capacitor voltages. Further, cost and quantitative comparisons are carried among the state-of-art circuits to highlight the supremacy of proposed circuit. Subsequently, the performance of HNIT is verified experimentally with the fundamental switching PWM technique at different load conditions. © 2004-2012 IEEE.Item A novel nine-level boost inverter with a low component count for electric vehicle applications(John Wiley and Sons Ltd, 2021) Shiva Naik, B.S.; Yellasiri, Y.; Aditya, K.; Nageswar Rao, B.N.In electric vehicles (EVs), considerable battery cells are cascaded in series for motor driving to improve the output voltage. The series combination of battery cells causes challenges like isolation of faulty cells, voltage unbalance, and slow charge equalization. Therefore, state-of-charge (SOC) and voltage equalization circuits are often used in industries to protect the battery cells. A nine-level inverter circuit with a double voltage boost is proposed to reduce the above issues based on the switch-capacitor (SC) principle. Unique features like self-balancing, voltage boosting are attained, which cannot be achieved through traditional inverters. The proposed topology can operate at a wide range of modulation indices ((Formula presented.)) to produce different voltage levels. The absence of a back-end H-bridge in the proposed circuit offers low voltage stress across the semiconductors. The operating principle, capacitor sizing, and modulation approach are presented. Further, experimental tests are conducted at different loading conditions to verify the performance of the proposed circuit. © 2021 John Wiley & Sons Ltd.Item A novel nine-level inverter with reduced component count using common leg configuration(Springer Science and Business Media Deutschland GmbH, 2023) Nageswar Rao, B.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.This article proposes a nine-level (9 L) inverter with a common leg configuration employing transformers and a single dc source. The suggested inverter uses eight switches and two transformers to produce 9 L output voltage. The suggested circuit minimizes the switches and transformers compared with existing transformer-based multilevel inverters (TMLI). Therefore, the proposed circuit cost, volume and complexity are also reduced. Additionally, a thorough comparison with the various 9 L inverter circuits is conducted to ensure the benefits of the suggested TMLI. A basic logic gate-based pulse width modulation (PWM) is implemented for the suggested 9 L inverter. Simulation and hardware studies verifying the feasibility and proficiency of the suggested inverter are performed. © 2023, The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature.Item A Reduced Component Count Self-Balance Quadruple Boost Seventeen-Level Switched Capacitor Inverter(Institute of Electrical and Electronics Engineers Inc., 2024) Ahmed, S.; Raushan, R.; Ahmad, M.W.A switched capacitor multilevel inverter (SCMLI) enables high-quality output voltage waveforms for various industrial and renewable energy applications. SCMLI uses a combination of capacitors and switches to generate multiple voltage levels from a single dc source, thereby reducing the overall cost and size of the system. This article proposes a novel configuration of a 17-level SCMLI. The proposed converter can boost four times the input voltage by exploiting the series-parallel connection of capacitors with the dc voltage source. With simple pulsewidth modulated (PWM) control, the capacitor voltages are inherently balanced under different loading conditions. Furthermore, for 11 switches, only seven independent switching signals are required. Loss analysis reveals that the proposed SCMLI has significantly reduced conduction losses, capacitor ripple voltage, voltage stress, and cost function (CF) when compared with other topologies available in the literature. Finally, the simulation results are obtained at different loads and modulation indexes. The results are experimentally validated with a scaled-down laboratory prototype. © 2024 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.