Faculty Publications

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    Synchronized SVPWM algorithm for overmodulation region for three-level VSI
    (2010) Veeranna, S.B.; Yaragatti, U.R.; Beig, A.R.
    Synchronization is essential for the satisfactory operation of VSI in high power applications. With proper selection of switching states it is possible to obtain synchronization and symmetry in space vector pulse width modulation (SVPWM) algorithm. A novel SVPWM based switching algorithm, which results in improved THD and increased fundamental voltage in overmodulation region by maintaining synchronization and symmetry is presented in this paper. A simple method to determine the switching sequence to achieve synchronization, quarter wave symmetry, half wave symmetry and three phase symmetry in overmodulation region is presented. The proposed algorithm is simulated and its performance in terms of the THD and magnitude of fundamental voltage of output is studied in the overmodulation region. The results show the improved performance of the proposed algorithm compared to the existing algorithms. The proposed algorithm is verified experimentally on a constant v/f three level VSI fed induction motor drive. © 2010 IEEE.
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    Data synchronization on Android clients
    (Institute of Electrical and Electronics Engineers Inc., 2015) Kedia, A.; Prakash, A.
    Past decade has witnessed meteoric advances in the field of mobile computing owing to the development of affordable hardware technologies as well as user-friendly software platforms. Android, the platform marketed by Google has boomed in sales over the past few years making it one of the major mobile platforms in the market. The steady growth of wireless information and communication technology in convergence with rise in the penetration of Internet has led to the evolution of a wide range of mobile applications like news, multi-player games, social networking, messaging, etc. that need to access remote data. For the optimal functioning of all these applications an efficient synchronization mechanism is vital. However smart-phones have limited computational resources, power restrictions and intermittent Internet connections which pose a challenge for smooth synchronization. This paper proposes a two-way data synchronization mechanism between multiple Android clients and a central server to address these challenges. We employ a batching logic to ensure efficient data transfer in poor network environments and a server-side conflict resolution mechanism to reduce overhead on the clients, which ensures optimal processing and battery power consumption by the clients. © 2015 IEEE.
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    Design and analysis of frequency adaptive CDSC-PLL for Dynamic Voltage Restorer during adverse grid conditions
    (Institute of Electrical and Electronics Engineers Inc., 2020) Abhilash Krishna, D.G.A.; Karthikeyan, A.
    This paper presents frequency feedback loop based Cascaded Delayed Signal Cancellation PLL employed for dynamic voltage restorer (DVR) application to compensate grid voltage disturbances. The primary and key function of PLL is continuous tracking of grid voltage angle in a precise manner and feed it to DVR control. The conventional CDSC-PLL performance during frequency variation is poor which affects the estimation of grid voltage angle and thereby leads to maloperation of DVR control. Thus in this paper FFL is added to the CDSC-PLL to adapt for frequency variations for effective operation of DVR control. The performance analysis of FFL based CDSC-PLL is presented for various disturbances. Finally, FFL based CDSC-PLL is incorporated in the 10 kV, DVR system and the simulation results of the system for different voltage disturbances by using MATLAB/SIMULINK. © 2020 IEEE.
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    Space vector-based synchronised bus-clamping pulse width modulation algorithms for three-level voltage source inverter in overmodulation region
    (2012) Veeranna, S.B.; Yaragatti, R.Y.; Beig, A.R.
    The main objective of the present work is to develop space vector-based synchronised bus-clamping pulse width modulation algorithms to improve total harmonic distortion and higher DC-bus utilisation of the three-level inverter in overmodulation region. The proposed algorithms can generate synchronised pulse width modulation waveforms with all possible pulse number preserving all the waveform symmetries. The results of the proposed algorithms are evaluated and compared with conventional space vector pulse width modulation algorithm. It is shown that the proposed algorithms give improved results in terms of total harmonic distortion and DC-bus utilisation than that of conventional one in overmodulation region. The proposed method is implemented and verified experimentally on a constant v/f drive fed from insulated gate bipolar transistor (IGBT)-based voltage source inverter using Motorola power PC-based embedded controller. © 2012 The Institution of Engineering and Technology.
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    Improved space vector PWM algorithm for three-level voltage source inverter in overmodulation region
    (Inderscience Publishers, 2013) Veeranna, S.B.; Yaragatti, U.
    In high power high performance AC drive industrial applications, multilevel inverters have established their importance, as they can synthesise output waveform with improved harmonic spectrum. In this paper, an improved synchronisation and symmetrical SVPWM algorithm is proposed for three-level inverter in overmodulation region for better utilisation of DC bus and to reduce harmonic distortion. The performance analysis of the proposed algorithm is compared with SHEPWM and STPWM for three-level voltage source inverter in terms of THD of line voltage and motor current along with fundamental component of the line voltage. It is shown that the proposed algorithm gives improved results compared to SHEPWM and STPWM algorithms. The algorithm is also verified experimentally on a constant v/f drive fed from IGBT-based voltage source inverter using Motorola power PC (MPC8240) based embedded controller. © 2013 Inderscience Enterprises Ltd.
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    Time synchronization problem of wireless sensor network using maximum probability theory
    (Springer, 2018) Upadhyay, D.; Dubey, A.K.; Santhi Thilagam, P.S.
    Synchronizing time between the sensors of wireless sensor network has vital importance. It helps in maintaining a consistent and reliable frame of time across the network. Two clocks are stated to be synchronized when their frequency source runs with equal rate and their offsets are set identical. Basically, due to the manufacturing difference there is slight variation in their clock oscillator which affects the degree of frequency source and accuracy. Therefore this leads to the problem of synchronizing time between the sensor clocks. To attain time synchronization in a network typical contention-based message passing techniques are used. In this paper two-way message passing scheme is utilized. It proposes a statistical tool based on the maximum probability theory for selecting the reference clock offset for time synchronization protocols. It also proposes a subset selection algorithm to support the proposed statistical tool. The results obtained consist of the selection of most probable estimate for clock offset. The proposed algorithm utilizes the two-way message passing scheme for the exchange of timing messages within the network. The proposed algorithm is compared with the existing algorithms for estimation of clock offset. It was observed that the proposed works gives better results in terms of efficiency i.e. 99.8% efficient. © 2018, The Society for Reliability Engineering, Quality and Operations Management (SREQOM), India and The Division of Operation and Maintenance, Lulea University of Technology, Sweden.
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    Application of non-linear Gaussian regression-based adaptive clock synchronization technique for wireless sensor network in agriculture
    (Institute of Electrical and Electronics Engineers Inc., 2018) Upadhyay, D.; Dubey, A.K.; Santhi Thilagam, P.S.
    Efficient and low power utilizing clock synchronization is a challenging task for a wireless-sensor network (WSN). Therefore, it is crucial to design a light weight clock synchronization protocols for these networks. An adaptive clock offset prediction model for WSN is proposed in this paper that exchanges fewer synchronization messages to improve the accuracy and efficiency. Timing information required is collected by setting a small WSN set up to investigate the soil condition to control the irrigation in agriculture. The networks investigate soils moisture, temperature, humidity, and pressure content along with the sensors clock offset. First, the prediction model perceives the existing sensor clock offset to observe the clock characteristics and delay. Then, a Gaussian function is applied for adjusting the parameters weight of the observed value in the prediction model. The system results demonstrate that the proposed adaptive non-linear Gaussian regression synchronization model utilizes 20% less energy as consumed by time sync protocol for sensor-network and reference broadcast synchronization Protocol. It also reduces the synchronization error with respect to root-mean-square error (RMSE) by 24.85% as compared to linear prediction synchronization with RMSE 28.72% in terms of accuracy. © 2001-2012 IEEE.
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    A statistical tool for time synchronization problem in WSN
    (Bentham Science Publishers P.O. Box 294 Bussum 1400 AG, 2019) Upadhyay, D.; Dubey, A.K.; Santhi Thilagam, P.S.
    Background: In recent research, time synchronization has a great importance in the various application of wireless sensor network. Localization, tracking, message passing using contention-based schemes and communication are some of the fields where synchronization between sensor clocks is highly required. Therefore, several algorithms were designed to achieve a rational and reliable frame of time within the wireless sensor network. Patents related to time synchronization in WSN were also analyzed. Methods: This paper discusses the powerful statistical tool using maximum probability theory for synchronizing the time within the sensor's clock. In this paper, maximum probability theory is applied to estimate the best value of clock offset between two sensor clocks. The proposed algorithm is analyzed by exchanging timing messages between nodes using two-way message exchange schemes. Results: The proposed algorithm is also implemented along with a Time-Sync Protocol for Sensor Network. It reduces error deviation from 2.32 to 0.064 ms as compared with Time-Sync Protocol for Sensor Network without proposed works. Conclusion: It was observed that for a small network, proposed work gives better and efficient results with Time-Sync Protocol for Sensor Network. © 2019 Bentham Science Publishers.
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    A Probabilistic Model of Clock Offset Estimator (PMCOE) for Clock Synchronization in Wireless Sensor Network
    (Springer New York LLC barbara.b.bertram@gsk.com, 2019) Upadhyay, D.; Dubey, A.K.; Santhi Thilagam, P.
    Synchronization of clock within a wireless sensor network epitomizes crucial problems in the efficient and reliable operation of the sensors. This paper discusses a novel probability theory based clock offset estimator for various clock synchronization schemes of wireless sensor networks is proposed. The motivation is to utilize local clock timing for achieving the global clock synchronization. It presents a probabilistic model to estimate the most expected value of clock offset for sensor nodes. This model uses a statistical tools based on dispersion and central tendency. The proposed model was compared with the existing clock offset estimating models. It was observed that the proposed model gives better results with 1.008% accuracy, 0.065% precision and 99.8% efficiency. © 2019, Springer Science+Business Media, LLC, part of Springer Nature.