Faculty Publications

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  • Item
    Failure analysis of service exposed austenitic stainless steel pipelines
    (Elsevier Ltd, 2020) Sreevidya, N.; Abhijith, S.; Albert, S.K.; Vinod, V.; Banerjee, I.
    Several leaks appeared in Austenitic Stainless Steel (ASS) pipelines installed for transporting water in a test loop after a few years of operation at Indira Gandhi Centre for Atomic Research, Kalpakkam. The locations of leaks were mostly on pipe fittings like bends, but a few were noticed on the pipe away from the fittings too. This paper presents the results of failure analysis carried out on leaking of pipes and fittings. Investigation carried out include optical as well as scanning electron microscopy, energy dispersive spectroscopy, electron back scattered diffraction analysis and microhardness measurements. In addition, double loop electrochemical potentio-kinetic reactivation experiments were conducted on specimens extracted from the pipe side and fitting side of a weld that was found leaking. Further ASS pipe welds prepared with different surface finish conditions were exposed to the environment of the installed pipeline and surface degradation in these pipe welds were compared to reveal the effect of surface treatment on degradation of the welds. It is found that the sensitization along with residual stress generated during welding facilitated intergranular stress corrosion cracking in pipe fittings made of AISI 304 stainless steel resulting in the leaks observed in the pipe fittings. Cracks initiated from the corrosion pits present near the weld, which most likely would have formed due to improper cleaning given to the weld zone after completion of the weld. Leak observed in the pipe is attributed to the crevice corrosion that progressed from a defect present in the pipe making it grown across the thickness. The defect itself was result of an improper repair by arc welding, of a discontinuity that was found in the pipe. The pipe is produced from sheets by resistance welding and the origin of the discontinuity is the poor joint formation during resistance welding. The paper also gives recommendation on good fabrication practices to be followed so that similar kind of failures could be avoided in future. © 2019 Elsevier Ltd
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    A High Performance Early Acknowledged Asynchronous Pipeline using Hybrid-logic Encoding
    (Elsevier B.V., 2020) Girija Sravani, K.; Rao, R.
    This paper details a novel asynchronous pipelining methodology that maximizes the throughput buffering capacity and robustness of gate-level pipelined systems. The data paths in the proposed pipeline style are encoded using hybrid logic encoding scheme, which incorporates simplicity of the single-rail encoding and robustness of the dual-rail encoding. The control path that provides the synchronization between pipeline stages is constructed based on the simple and high-speed early acknowledgment protocol. Further, the proposed pipeline accommodates isolate phase to achieve 100% storage capacity. Two test cases: A 4-bit,10-stage FIFO and a 16-bit adder, have been designed in 90 nm technology to validate the proposed pipeline style. The FIFO has been laid out in the UMC 180 nm process using the cadence tool suite. The post-layout results of FIFO show 12.5% better throughput than the high capacity single-rail pipeline. Simulation results of the adder also reveal that the proposed structure achieves the throughput of 3.44 Giga-items/sec, which is 44.18% higher than the APCDP (Asynchronous pipeline based on constructed critical path) and 11.9% higher than the high capacity single-rail pipelines. © 2019 Elsevier B.V.
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    A study on the behavior of CO2 corrosion on pipeline using computational fluid dynamics, experimental and artificial neural network approach
    (IOP Publishing Ltd custserv@iop.org, 2020) Nayak, N.; Anarghya, A.; Al Adhoubi, M.
    Corrosion of the piping systemis a genuine problem in the oil and gas industry.Most oil and gas industries used a carbon steel pipeline for the transportation of crude oil, which is affected by CO2 corrosion. Now a day, the computational approach and artificial neural network approach will be used to study the corrosion rate. Therefore, in this work, Computational Fluid Dynamics (CFD) and Artificial Neural Network (ANN) studies on piping systems were made to determine the corrosion rate induced byCO2 saturated aqueous solutions on carbon steel pipeline. In CFD study, corrosion rates were computed by modeling the electrochemical processes occurring at themetal substrate fromcathodic reductions of the carbonic acid and hydrogen ions, and the anodic oxidation of the metal component. Also, an artificial neural network study wasmade using a multilayer perceptron neural network method; and, computational fluid dynamics and artificial neural network simulations were validated with in-house built experiment set-up. The experimental study had been carried out for more than 200-h to find the corrosion rate on the pipeline, and satisfactory trendswere observed between computational fluid dynamics, artificial neural network, and experimental values. In the end, corroded pipes were observed under a scanning electron microscope and X-ray spectroscopy, and the corroded zones were viewed as against the non-corroded pipe. © 2020 IOP Publishing Ltd.
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    Design of high throughput asynchronous FIR filter using gate level pipelined multipliers and adders
    (John Wiley and Sons Ltd vgorayska@wiley.com Southern Gate Chichester, West Sussex PO19 8SQ, 2020) Girija Sravani, K.; Rao, R.
    This work presents the design of an asynchronous digital finite impulse response (FIR) filter suitable for high-performance partial response maximum likelihood (PRML) read channel ICs. A high throughput, low latency FIR filter is the basic requirement for the equalization process in read channels. To achieve the enhancement in speed and reduction in latency of the FIR filter, its computational units are deeply pipelined using high-capacity hybrid (HC-hybrid) logic pipeline method. The designed FIR filter has been simulated using UMC-180 nm and UMC-65 nm technologies. Simulation results show that the asynchronous digital FIR filter can operate up to a throughput of 1.17 Giga items/s in 180 nm and 2.3 Giga items/s in 65 nm technology yet with the latency in the order of ns. © 2020 John Wiley & Sons, Ltd.
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    A Mixed Parallel and Pipelined Efficient Architecture for Intra Prediction Scheme in HEVC
    (Taylor and Francis Ltd., 2022) Poola, L.; Aparna., P.
    The complexity of intra prediction in High-Efficiency Video Coding (HEVC) is increased significantly due to the incorporation of inherent features like variable-sized quadtree partitioned coding units and 35 angular modes that help in achieving better compression. This paper presents an efficient hardware architecture for the intra prediction that supports and comprises the above aspects and achieves a higher throughput to support high definition (HD) videos. A compact reusable reference buffer structure is implemented to limit the buffer size to 1 KB. A dedicated arithmetic unit to take advantage of the parallelism present in the prediction algorithm is incorporated, which allows the reuse of multipliers to reduce hardware resources. The loading of reference samples to buffers for prediction causes significant delays which are eliminated in our design. The entire architecture functions as a pipelined unit with no data dependency and generates eight samples/clock cycle in parallel. The design is implemented on a Field Programmable Gate Array (FPGA) platform operating at a frequency of 110 MHz. This makes it possible to support 4 K videos at 30 frames per second, with the resource cost of 16 K logic gates and 122 registers. © 2022 IETE.
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    An efficient parallel-pipelined intra prediction architecture to support DCT/DST engine of HEVC encoder
    (Springer Science and Business Media Deutschland GmbH, 2022) Poola, L.; Aparna., P.
    The complexity of intra prediction in high-efficiency video coding (HEVC) is increased due to the addition of five variable sized prediction units (PUs) and 35 directional predictions. In this work, we propose an efficient parallel-pipelined architecture that can process 8 samples in parallel for every clock cycle. The functional units needed to predict the PU samples work in a pipelined fashion. With this balanced combination of parallel-pipelined structure, we are able to achieve higher throughput with limited hardware resources than existing literature works. The samples are processed row-wise, so that they can be directly transform coded, thus eliminating the need for an intermediate memory buffer of 8 K between the two modules. A compact reconfigurable reference buffer of size 0.8 KB is incorporated to reduce the read-write latency associated with reference samples’ fetching. A dedicated module for arithmetic operations is used in the intra engine that ensures the reuse of multipliers to increase the hardware efficiency. The architecture so designed supports all the PU sizes and directional modes. The proposed design is tested and implemented on a field-programmable gate array (FPGA) platform operating at 150 MHz frequency to achieve 8 samples throughput with a hardware cost of 16.2 K Look-Up Tables (LUTs) and 5.7 K registers to support HD 4 K real-time video encoding applications. © 2022, The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature.
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    Studies on Parameters affecting Flow Behaviour of High-Concentration Ash Slurry: Effect of a Natural Drag reducing Agent on Pumping Power during Pipeline Transportation
    (Springer, 2022) Senapati, S.; Mohanty, A.
    During 2019–20, Indian coal-based thermal power plants produced 226.13 million tonnes of coal ash (fly ash + bottom ash) which urged for safe disposal from an environmental point of view. Though as per the Ministry of Environment and Forests (MoEF) and Climate Change (CC) notification dated 3rd November 2009, 100% disposal of fly ash has to be effected in dry form for gainful utilisation within 5 years of the notification, as per the report available in 2020, 83% utilisation has been effected so far. In spite of such notification, thermal power plants always prefer to provide emergency disposal of fly ash through slurry mode to take care of the eventuality of failure for disposal of fly ash in dry form. Therefore, emergency disposal through slurry is done usually in high-concentration form for which the flow behaviour of the suspension mixture requires a thorough investigation prior to its transportation. The present study aims at evaluating the flow behaviour of the concentrated fly ash–water slurry by adding small dosages of eucalyptus leaf extract as a natural drag reducing agent (DRA). The flow behaviour of the ash–water slurry was found to be non-Newtonian in nature and was quite well described by a Bingham plastic model in the slurry concentration range of 55–65% by weight. Further, it was observed that the said bio-additive dosages (0.3–1.5%, v/v) modified the flow behaviour of ash–water slurry and was able to reduce the yield stress and viscosity quite considerably with a clear indication that the pumping power requirement and hence the specific energy consumption (SEC) could be reduced substantially while transporting these huge wastes through a slurry pipeline at high solids concentration. © 2022, The Institution of Engineers (India).
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    Hardware Efficient Integrated In-loop Filter for HEVC Encoder
    (Taylor and Francis Ltd., 2024) Poola, L.; Aparna., P.
    The deblocking filter (DF) and the sample adaptive offset (SAO) filter, which aids in enhancing the subjective quality of the image, make up the in-loop filter of the high-efficiency video coding (HEVC) encoder and decoder. The in-loop filter significantly increases the computational load on the HEVC encoder. It is challenging to design an in-loop filter on hardware that can handle intensive computations while using the least amount of on-chip memory, taking external memory traffic and dependencies simultaneously delivering high throughput to support Ultra HD video applications. The proposed design employs the following strategies to address these issues. This work proposes an address generation technique for pipelined horizontal and vertical filtering in DF, that avoids a transpose buffer which otherwise is required. This enables easy pipelining and parallelization thus improving throughput while reducing the on-chip memory utilization. A simplified SAO filter with parallel-pipelined processing is included in the design. These features enable the design to support ultra-HD 7680 (Formula presented.) 4320 @ 40 fps video applications. The proposed hardware architecture has a total gate count of 7.73 K LUTs and 2.8 K slice registers, and it is implemented on a 28 nm field programmable gate array (FPGA) platform. © 2024 IETE.
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    Design and Verification of an Asynchronous NoC Router Architecture for GALS Systems
    (Springer, 2024) Saranya, M.N.; Rao, R.
    The increasing multi-core system complexity with technology scaling introduces new constraints and challenges to interconnection network design. Consequently, the research community has a converging trend toward an asynchronous design paradigm for Network-on-Chip (NoC) architecture as a promising solution to these challenges. This paper addresses the design and functional verification aspects of an asynchronous NoC router microarchitecture for a Globally Asynchronous Locally Synchronous (GALS) system. Firstly, the paper introduces a novel mixed-level abstract simulation approach for faster functional verification of the asynchronous architecture using the commercially available Spectre Analog and mixed-signal simulation (AMS) Designer tool. This simulation methodology intends to ensure the feasibility of the design and identify shortcomings, if any, before the subsequent implementation stages of the design. Also, the paper proposes a new baseline asynchronous router built on a domino logic pipeline template with a novel hybrid encoding scheme. The new hybrid encoding scheme facilitates simple architecture with no additional timing constraints. The proposed verification methodology evaluates the baseline asynchronous router’s functional verification in Cadence’s AMS designer tool. Preliminary simulation results conform to the objectives of the paper. Further, the same verification setup establishes the design validation in subsequent stages of the design implementation. © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2024.
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    Enhancing the Flow-Accelerated Corrosion Resistance of X70 API Steel Through Laser Surface Melting in Synthetic Oilfield Water
    (John Wiley and Sons Inc, 2025) Ajmal, T.S.; Singh, R.K.; Arya, S.B.; Kumar D, S.
    Hydrodynamic flow conditions play a critical role in piping failure due to sharp variations of the Reynolds number in process and petrochemical industries. The current study aims to enhance flow-accelerated corrosion (FAC) resistance using metallurgy of the surface by utilizing the laser surface melting (LSM) technique. The FAC behavior of API X70 steel in simulated Indian synthetic oilfield water was studied by utilizing a closed-loop corrosion apparatus to simulate the pipeline flow. Electrochemical corrosion experiments (AC and DC methods) were conducted at a constant fluid velocity of 3 m/s in untreated and LSM-treated samples (at 2.5 and 3.0 kW) placed at a 90° pipe elbow. Experimental results showed that LSM-treated samples displayed enhanced resistance to FAC, attributed to changes in surface metallurgy. Additionally, it was observed that the corrosion rate varied within the pipe elbow for the different samples at different locations. © 2024 Wiley-VCH GmbH.