Faculty Publications

Permanent URI for this communityhttps://idr.nitk.ac.in/handle/123456789/18736

Publications by NITK Faculty

Browse

Search Results

Now showing 1 - 5 of 5
  • Item
    An energy efficient algorithm to avoid hot spot effects in Wireless Sensor Networks
    (IEEE Computer Society help@computer.org, 2013) Kumar, P.; Chaturvedi, A.
    In this paper, a novel approach is proposed to minimize the hot spot effect to improve the life time of Wireless Sensor Networks (WSNs) based on energy of each sensor node. To implement the proposed approach, the spatial locations of geographical area under surveillance are motioned using binary location index. The simulation work is carried out for two different case studies; in first case the sink/base station is remains stationary during entire observation, whereas in other case the sink is reallocated to appropriate locations at suitable time instants. Timely varying pattern of residual energy of all network nodes and total number of queries supported by entire network till it attains targeted life time is presented and discussed. © 2013 IEEE.
  • Item
    A geographical location aware energy efficient routing scheme for query based Wireless Sensor Networks
    (2013) Kumar, P.; Chaturvedi, A.; Shrivastava, S.
    In this paper, a geographical location based routing scheme is proposed that works effectively for different hierarchical networks and thus supports an important aspect of network scalability. Further, herein a heuristic is proposed that minimizes the occurrence of hot spot to improve the overall life time of Wireless Sensor Networks (WSNs). This utilizes residual energy estimation based on energy of each sensor node. Its implementation mainly comprises of the geographical location of each sensor in Binary Location Index (BLI) representation form, precise updates about the link with shortest path, and coverage of the each sensor; the method which is without change of cluster head is compared with the change of cluster head based on BLI for fixed single sink.
  • Item
    Location movement and multiplicity attributes of sink in query-based wireless sensor networks
    (Inderscience Publishers, 2015) Kumar, P.; Chaturvedi, A.
    The principal issue in wireless sensor networks (WSNs) is the efficient use of finite energy of each sensor node as it predominantly influences the life time of WSN. In this work, we proposed four case studies on a typical square shape geographical area. In all these cases, the network architecture is hierarchical and same network environment is considered. These cases differ from each other on sink node(s) features viz. single/multiple, optimality of locations and stationary/moveable. As sink node plays an important role in a bridging the communication between the remote entities (sensor nodes) and access points/users; the proposed algorithms are formulated by keeping sink node(s) in centre stage. Further, the paper concludes by comparing various outcome measures like number of queries supported, average residual energy status (RES) estimation that directly impact the 'hot spot' phenomenon, thus enhances network life time while ensuring avoidance of 'islanding' and still adhere to energy efficient usage of network resources. © © 2015 Inderscience Enterprises Ltd.
  • Item
    Analysis of cache behaviour and software optimizations for faster on-chip network simulations
    (Springer, 2019) Prasad, B.M.P.; Parane, K.; Talawar, B.
    Fast simulations are critical in reducing time to market in chip multiprocessors and system-on-chips. Several simulators have been used to evaluate the performance and power consumed by network-on-chips (NoCs). To speedup the simulations, it is necessary to investigate and optimize the hotspots in the simulator source code. Among several simulators available, Booksim2.0 has been chosen for the experimentation as it is being extensively used in the NoC community. In this paper, the cache and memory system behavior of Booksim2.0 have been analyzed to accurately monitor input dependent performance bottlenecks. The measurements show that cache and memory usage patterns vary widely based on the input parameters given to Booksim2.0. Based on these measurements, the cache configuration having the least misses has been identified. To further reduce the cache misses, software optimization techniques such as removal of unused functions, loop interchanging and replacing post-increment operator with pre-increment operator for non-primitive data types have been employed. The cache misses were reduced by 18.52%, 5.34% and 3.91% by employing above technology respectively. Thread parallelization and vectorization have been employed to improve the overall performance of Booksim2.0. The OpenMP programming model and SIMD are used for parallelizing and vectorizing the more time-consuming portions of Booksim2.0. Speedups of 2.93× and 3.97× were observed for the Mesh topology with 30 × 30 network size by employing thread parallelization and vectorization respectively. © 2019, The Society for Reliability Engineering, Quality and Operations Management (SREQOM), India and The Division of Operation and Maintenance, Lulea University of Technology, Sweden.
  • Item
    Extending BookSim2.0 and HotSpot6.0 for power, performance and thermal evaluation of 3D NoC architectures
    (Elsevier B.V., 2019) Halavar, B.; Pasupulety, U.; Talawar, B.
    With the increase in number and complexity of cores and components in Chip-Multiprocessors (CMP) and Systems-on-Chip (SoCs), a highly structured and efficient on-chip communication network is required to achieve high-performance and scalability. Network-on-Chip (NoC) has emerged as a reliable communication framework in CMPs and SoCs. Many 2-D NoC architectures have been proposed for efficient on-chip communication. Cycle accurate simulators model the functionality and behaviour of NoCs by considering micro-architectural parameters of the underlying components to estimate performance, power and energy characteristics. Employing NoCs in three-dimensional integrated circuits (3D-ICs) can further improve performance, energy efficiency, and scalability characteristics of 3D SoCs and CMPs. Minimal error estimation of energy and performance of NoC components is crucial in architecture trade-off studies. Accurate modeling of re:Horizontal and vertical links by considering micro-architectural and physical characteristics reduces the error in power and performance estimation of 3D NoCs. Additionally, mapping the temperature distribution in a 3D NoC reduces estimation error. This paper presents the 3D NoC modelling capabilities extended in two existing state-of-the-art simulators, viz., the 2D NoC Simulator - BookSim2.0 and the thermal behaviour simulator - HotSpot6.0. With the extended 3D NoC modules, the simulators can be used for power, performance and thermal measurements through micro-architectural and physical parameters. The major extensions incorporated in BookSim2.0 are: Through Silicon Via power and performance models, 3D topology construction modules, 3D Mesh topology construction using variable X, Y, Z radix, tailored routing modules for 3D NoCs. The major extensions incorporated in HotSpot6.0 are: parameterized 2D router floorplan, 3D router floorplan including Through Silicon Vias (TSVs), power and thermal distribution models of 2D and 3D routers. Using the extended 3D modules, performance (average network latency), and energy efficiency metrics (Energy-Delay Product) of variants of 3D Mesh and 3D Butterfly Fat Tree topologies have been evaluated using synthetic traffic patterns. Results show that the 4-layer 3D Mesh is 2.2 × better than 2-layer 3D Mesh and 4.5 × better than 3D BFT variants in terms of network latency. 3D Mesh variants have the lowest Energy Delay Product (EDP) compared to 3D BFT variants as there is an 80% reduction in link lengths and up to 3 × more TSVs. Another observation is that the EDP of the 4-layer 3D BFT (with transpose traffic) is 1.5 × the EDP of the 4-layer 3D Mesh (with transpose traffic). Further optimizations towards a tailored 3D BFT for transpose traffic could reduce this EDP gap with the 4-layer 3D Mesh. From the 3D NoC heat maps, it was found that the edge routers in the floorplan of the tested 3D Mesh and 3D BFT topologies have the least ambient temperature. © 2019