Faculty Publications
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Publications by NITK Faculty
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Item Synchronized symmetrical bus-clamping PWM strategies for three level inverter: Applications to low switching frequencies(2011) Veeranna, S.B.; Yaragatti, U.R.; Beig, A.R.The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter. © 2011 Berkeley Electronic Press. All rights reserved.Item Fast start crystal oscillator design with negative resistance control(Elsevier B.V., 2019) Kumar, P.; Rekha, S.Clock is an essential part of most of the integrated circuits as time base reference. It must be very accurate, highly reliable and readily available as soon as it is enabled. In all types of oscillator architectures, crystal oscillator is the most accurate and stable clock generator. But usually the crystal oscillator circuit suffers from slow startup. Therefore, it is essential to improve the startup time with optimally controlled crystal drive such that crystal drive power rating is not compromised. We propose a method that discusses about increasing the negative resistance during startup, using a startup circuit for fast start. Once the reliable startup is achieved, the negative resistance is decreased and the startup circuit is disconnected. The reduction in negative resistance is done with current steps and there are two ways in which it is achieved, the Digital control method and Analog control method. In digital control method, the current steps are timed at regular intervals and in analog control method, oscillator output amplitude is given as feedback to the startup circuit there by reducing the negative resistance. In the 32768 Hz real time clock generating oscillator, the startup time can be improved from 330 ms to 220 ms using the conventional startup method. With the proposed digital control method, lesser startup time of 160 ms is achieved and in analog control method it is further reduced to 120 ms. © 2018 Elsevier B.V.Item Efficiency improvement and torque ripple minimisation of four-phase switched reluctance motor drive using new direct torque control strategy(Institution of Engineering and Technology kvukmirovic@theiet.org, 2020) Pittam, P.K.; Ronanki, D.; Parthiban, P.The direct torque control (DTC) strategy is one of the most effective techniques, used to control the switched reluctance motor (SRM) with improved dynamic performance and reduced torque ripple. However, this approach draws a higher source current due to an extension of the phase current into the negative torque region, which lowers the net torque per ampere ratio. This study proposes a new DTC strategy for SRM to overcome this issue by modifying the partition of the sectors and appropriate voltage vector selection. Therefore, the proposed method improves the drive efficiency while minimising torque ripple. To implement this method, a non-linear machine model is developed using the torque and flux characteristics obtained from experimental studies on a four-phase 8/6 SRM. The proposed DTC scheme is implemented on a digital control platform and power loss calculations are performed to evaluate the drive efficiency. Test results show that the proposed DTC method has improved performance in terms of efficiency and torque ripple under various operating conditions in comparison to the conventional DTC strategy. © The Institution of Engineering and Technology 2019.Item Design and Development of Modular Dual-Input DC-DC Step-Up Converter for Telecom Power Supply(Institute of Electrical and Electronics Engineers Inc., 2021) Kiran, R.; Kalpana, R.A modified modular dual-input dc-dc step-up converter along with a battery charging/discharging bidirectional converter that is suitable for telecom load applications is proposed in this article. The proposed converter has two individual input modules with the three-leg semiactive rectifier connected in parallel at secondary side for achieving constant voltage across the load with reduced circulating power. This results in an advantage of having compact structure with reduced number of components. The proposed converter works under a zero-voltage switching condition, it has favorable advantage such as low switching losses and high efficiency of the system. The complete design and steady-state analysis of the proposed converter utilizing field programmable gate array (FPGA)-based digital control strategy have been investigated in this article. A scaled down laboratory prototype of 1 kW has been developed and the robustness of the proposed converter is validated by extensive test results under variable input voltage and load conditions. © 1972-2012 IEEE.Item A Two-Stage Module Based Cell-to-Cell Active Balancing Circuit for Series Connected Lithium-Ion Battery Packs(Institute of Electrical and Electronics Engineers Inc., 2023) Manjunath, K.; Kalpana, R.; Singh, B.; Kiran, R.This article addresses a two-stage module based cell-to-cell active equalization topology based on a modified buck-boost converter for series connected Lithium-ion battery packs. In the proposed topology, initially module based equalizing currents are controlled. Subsequently, cell-based equalizers are controlled in parallel within each battery module. The proposed topology significantly reduces the balancing time by transferring higher balancing current from a strong cell to the weakest cell in a module directly. With the proposed topology's modularized design, reduces voltage stress on long strings of switches, resulting in improved performance with fewer components. The operating principle, control strategy and design constraints are analyzed in detail. The MATLAB/Simulink platform is utilized to demonstrate the feasibility of the proposed technique for balancing the energy in series connected battery cells. To reduce the complexity of the control approach, the digital control is implemented using an FPGA control board. Further, a laboratory prototype is developed to show the feasibility and operability of the proposed topology. © 1986-2012 IEEE.Item A Systematic Approach to Digital Control Development for Four-Phase SRM Drive Using Single Current Sensor for Medium Power Applications(Institute of Electrical and Electronics Engineers Inc., 2024) Ali, T.F.; Dominic D, D.A.; Prabhakaran, P.In the realm of medium-power high-volume applications, Switched Reluctance Motor (SRM) drives hold great advantages over other motors. However, the SRM drive must be optimized to reduce cost without compromising the performance for medium power applications. This paper presents a novel SRM drive utilizing a Miller converter-fed SRM motor with a single current sensor, offering a comprehensive control development procedure encompassing system modeling, design procedures, dynamic simulation, analysis, and experimental validation. The SRM is characterized through finite element analysis (FEA) to derive a MATLAB Simulink simulation model, and the conduction angle is optimized for drive efficiency through parametric simulation studies. The linear SRM model for control design is obtained via small signal analysis. Speed and current controllers are designed using the K-factor method, and the efficacy of the proposed drive is rigorously evaluated across various operating modes in MATLAB Simulink. Additionally, a hardware prototype is developed and the digital control algorithm is implemented on the DSP microcontroller TMS320F28379D based on the designed controllers to further assess drive performance. The results obtained validate the robustness and dynamic performance of the SRM drive across variable speed, variable torque, and constant power modes of operation. © 2013 IEEE.