Faculty Publications
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Item A Single Stage Switched-Capacitor Hexad Boost Multilevel Inverter Featuring Boost Ability(Institute of Electrical and Electronics Engineers Inc., 2020) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.Nowadays, curtailment in the number of dc sources, circuit component count along with the boosting gain property of the output voltage are considered as the essential topological features for the new multilevel inverter (MLI) structures. Considering the above, a novel 13-level single-stage switched-capacitor hexad boost (S3 CHB) inverter featuring boosting gain and self-balancing ability is proposed in this paper. Each phase of the proposed \mathrm{S}^{3} CHB-MLI is designed with only 14 semiconductor switches and three electrolytic capacitors. Here, the capacitors' voltages are balanced automatically by utilizing the series-parallel technique effectively. An absence of H-bridge at the back-end makes the circuit to extend for higher levels. Capacitors' voltage ripple are analyzed in detail. Further, a cost comparison is conducted among the state-of-art MLIs to highlight the superiority of the proposed configuration. Finally, the effectiveness of the proposed \mathrm{S}^{3} CHB circuit is experimentally demonstrated. Results at different load conditions are captured to prove the inductive load capability. © 2020 IEEE.Item A review on symmetric, asymmetric, hybrid and single DC sources based multilevel inverter topologies(Elsevier Ltd, 2017) Venkataramanaiah, J.; Yellasiri, Y.; Panda, A.K.In recent past, multilevel inverters(MLIs) are treated as sophisticated power conversion systems demanded for high power medium voltage applications. The aim of this article is to review on recent examined multilevel inverter topologies which can be classified into four groups according to the DC voltage supplied to each fundamental unit and/or arrangement of non-identical fundamental units in an one configuration: Symmetric, Asymmetric, Hybrid and Single DC source topologies. In each group, several new versions have been constructed for last few decades. In this study the position (design and functionality) of each and every topology and also every group are reviewed. Further, a special attention is focused on Single DC source MLIs. Finally at the end of the review, merits, limitations and adequate applications are clearly mentioned. Thus, present review provides complete overview among newly developed multilevel inverters. © 2017 Elsevier LtdItem Cascade multilevel inverter using sub multi-cells(Praise Worthy Prize S.r.l, 2016) Pakala, P.; Yellasiri, Y.Multilevel inverters (MLI) are one of the selected areas in the industry for medium and high power application. The real challenge of MLI is to generate more voltage levels utilizing less voltage sources and power semiconductor switches. This paper presents a new topology of cascaded multilevel inverter with sub multi-cells. This new structure is optimized based on number of powers witches, voltage sources. Moreover the topology enhancement of this cascaded multilevel inverter considering various factors such as the number of power semiconductor devices, the voltage levels of output and the switch standing voltage is given. Since the proposed topology is generalized, the traditional cascaded multilevel inverters can be derived from the proposed multilevel inverter and it offers a provision to propose the desired cascaded multilevel inverter. In addition to that, some facts related to the proposed topologies are proved mathematically. It has the capacity to produce increased output voltage levels with less sources voltages and switches. The proposed topology will generate twenty five output voltage levels with twelve numbers of switches. Further, to figure out the value of voltage sources, an algorithm is presented. To check the operation and execution of the proposed structure, MATLAB/Simulink is used for the simulation and to validate these results a hardware prototype is developed and results are presented. © 2016 Praise Worthy Prize S.r.l. - All rights reserved.Item Investigation on stacked cascade multilevel inverter by employing single-phase transformers(Elsevier B.V., 2016) Yellasiri, Y.; Panda, A.K.In the present paper a new version of multilevel inverter is investigated. This new version is based on hybrid association of commutation cells with H-bridge cells. The association allows a significant reduction of the volume of the capacitors. In fact, presented topology allows us to work on higher input voltage levels with the same power switches. This new version is generally called as SCMI (stacked cascade multilevel inverter). The proposed inverter has potential to generate high quality waveforms, reduction in switching frequency, capable to operate at higher voltage levels and finally utilizes minimum number of switching components. The presented version of SCMI is simulated in Matlab-simulink and further, experimental validation is carried out in the laboratory with prototype setup. © 2016 Karabuk UniversityItem Development of a New Hybrid Multilevel Inverter Using Modified Carrier SPWM Switching Strategy(Institute of Electrical and Electronics Engineers Inc., 2018) Venkataramanaiah, J.; Yellasiri, Y.; Panda, A.K.This letter presents a single-phase cascaded transformer based multilevel inverter with a modified carrier-based level shift sinusoidal pulse width modulation (LS-SPWM) technique. The developed topology has two bridges with individual low frequency transformers. The bridges can generate quasi-square waveform and pulse width modulated waveform independently and energized the two transformers whose secondary terminals are cascaded to attain 19-level output voltage waveform across the load. The anticipated configuration has the least number of components to reduce the cost and enhance the reliability of the converter for medium power applications with inbuilt isolation. Furthermore, this letter presents the most common LS-SPWM technique with a new carrier to enhance the fundamental magnitude and shifts the dominant harmonics into three times of the traditional strategy for the same modulation indices. The performance of the proposed topology is validated with experimental results. © 1986-2012 IEEE.Item A Fuzzy Logic Based Switching Methodology for a Cascaded H-Bridge Multi-Level Inverter(Institute of Electrical and Electronics Engineers Inc., 2019) Azeem, H.; Yellasiri, Y.; Jammala, V.; Shiva Naik, B.S.; Panda, A.K.In this letter, an unusual switching technique is implemented using a fuzzy logic approach. The proposed technique simplifies the conventional method by eliminating the traditional logic-gate design. The fuzzy logic pulse generator acts as a lookup table as well as a pulse generator. On the basis of the modulation index as input, controlled membership functions (MFs) and rules of the fuzzy logic controller open various possibilities of producing pulses directly. The proposed technique is evaluated on the cascaded multi-level inverter with symmetric and asymmetric operations using selective harmonic elimination pulsewidth modulation. MFs are designed on the basis of pre-calculated firing conditions for different modulation index values. Hardware verification is carried out to support the proposed switching technique. © 1986-2012 IEEE.Item Design and implementation of a novel nine-level MT-MLI with a self-voltage-balancing switching technique(Institution of Engineering and Technology kvukmirovic@theiet.org, 2019) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.In this study, a novel nine-level modified T-type multilevel inverter (MT-MLI) with a simple capacitor balancing technique is proposed. The proposed MT-MLI circuit can generate higher levels with a single DC source and the minimum number of switching components. Each phase of the proposed topology contains ten switches and one flying capacitor (FC). The DC source voltage is divided into two parts with the help of capacitors. Phase disposition-sine pulse-width modulation technique is employed to regulate the DC-link capacitors and FC voltages. To reduce the control complexity of FC-based circuits, quarter-cycle selector is introduced to control the FC voltage within the given half fundamental cycle using redundant states, so an external capacitor charging setup is not required. Furthermore, to highlight the potential merits of the proposed MT-MLI, the comparison is made among state-of-the-art MLIs. Simulation verification of the MT-MLI is done using MATLAB/ Simulink, and then hardware verifications are done using the laboratory prototype setup with Opal-RT controller. Finally, adequate results are presented to validate the proposed MT-MLI. © The Institution of Engineering and Technology 2019Item Experimental verification of a hybrid multilevel inverter with voltage-boosting ability(John Wiley and Sons Ltd vgorayska@wiley.com Southern Gate Chichester, West Sussex PO19 8SQ, 2020) Shiva Naik, B.; Yellasiri, Y.; Venkataramanaiah, J.A new nine-level natural-balanced boost hybrid multilevel inverter (BH-MLI) is proposed in this paper. Each phase of the proposed BH-MLI is designed with only 11 semiconductor switches and two electrolytic capacitors. Here, the capacitor voltages are balanced by utilizing the series-parallel and natural balancing techniques effectively. Furthermore, the proposed circuit eradicates the multiple DC sources by introducing a single DC link for single- and three-phase applications. The proposed topology can be easily extendible to obtain higher level output voltage waveform due to its modular-switched capacitor cells (SCCs). Besides, the higher voltage level generation does not pose high-voltage stress on any of the topology components, as the blocking voltage of all devices within the source voltage magnitude. Further, a quantitative comparison is conducted among the state-of-art switched-capacitor multilevel inverter (SC-MLIs) to highlight the superiority of the proposed configuration. Finally, the performance of the proposed BH-MLI is experimentally validated with phase disposition-pulse width modulation (PD-PWM) and round control method at different modulation indices, load conditions. © 2020 John Wiley & Sons, Ltd.