Faculty Publications
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Item Design and implementation of a novel nine-level MT-MLI with a self-voltage-balancing switching technique(Institution of Engineering and Technology kvukmirovic@theiet.org, 2019) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.In this study, a novel nine-level modified T-type multilevel inverter (MT-MLI) with a simple capacitor balancing technique is proposed. The proposed MT-MLI circuit can generate higher levels with a single DC source and the minimum number of switching components. Each phase of the proposed topology contains ten switches and one flying capacitor (FC). The DC source voltage is divided into two parts with the help of capacitors. Phase disposition-sine pulse-width modulation technique is employed to regulate the DC-link capacitors and FC voltages. To reduce the control complexity of FC-based circuits, quarter-cycle selector is introduced to control the FC voltage within the given half fundamental cycle using redundant states, so an external capacitor charging setup is not required. Furthermore, to highlight the potential merits of the proposed MT-MLI, the comparison is made among state-of-the-art MLIs. Simulation verification of the MT-MLI is done using MATLAB/ Simulink, and then hardware verifications are done using the laboratory prototype setup with Opal-RT controller. Finally, adequate results are presented to validate the proposed MT-MLI. © The Institution of Engineering and Technology 2019Item Design and implementation of novel multilevel inverter with full DC-utilization(Taylor and Francis Ltd., 2025) Nageswar Rao, B.; Yellasiri, Y.; Aditya, K.; Shiva Naik, B.S.; Karunakaran, E.This paper presents a novel single-source transformer-based nine-level (9 L) inverter configuration. The design incorporates a three-level neutral-point-clamped (3 L NPC) inverter, a 3-L full bridge, and a transformer to produce 9 L output voltage levels. In particular, one of the 2 L legs in the full bridge is common among the transformer and the load. The proposed structure minimises the components compared to existing transformer-based nine-level inverters. Thus, the suggested inverter volume, cost, and complexity are minimised. Furthermore, a pulse width modulation method has been developed to generate the necessary gating pulses for the proposed inverter. Additionally, a complete comparison study illustrates the enhanced performance of the suggested architecture. The validity of the suggested 9 L inverter is assessed by performing MATLAB simulations and using a scaled prototype. The results obtained from the simulations and experimental tests are then presented and analysed. A clear correlation was observed between the simulation and the hardware results. © 2024 Informa UK Limited, trading as Taylor & Francis Group.