Faculty Publications
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Item A Hybrid Nine-Level Inverter Topology with Boosting Capability and Reduced Component Count(Institute of Electrical and Electronics Engineers Inc., 2021) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.Nowadays, output voltage boosting gain property along with curtailment in the circuit voltage stress, and component count are considered as the essential topological features for the new multilevel inverter (MLI) circuits. Recognizing the above, a hybrid nine-level inverter topology (HNIT) for DC-AC conversion is proposed in this brief. Each phase of the HNIT is designed with only eight semiconductor switches, one diode, and two electrolytic capacitors. Herein, series-parallel and conventional-series techniques are utilized effectively to balance the capacitor voltages. Further, cost and quantitative comparisons are carried among the state-of-art circuits to highlight the supremacy of proposed circuit. Subsequently, the performance of HNIT is verified experimentally with the fundamental switching PWM technique at different load conditions. © 2004-2012 IEEE.Item A novel nine-level boost inverter with a low component count for electric vehicle applications(John Wiley and Sons Ltd, 2021) Shiva Naik, B.S.; Yellasiri, Y.; Aditya, K.; Nageswar Rao, B.N.In electric vehicles (EVs), considerable battery cells are cascaded in series for motor driving to improve the output voltage. The series combination of battery cells causes challenges like isolation of faulty cells, voltage unbalance, and slow charge equalization. Therefore, state-of-charge (SOC) and voltage equalization circuits are often used in industries to protect the battery cells. A nine-level inverter circuit with a double voltage boost is proposed to reduce the above issues based on the switch-capacitor (SC) principle. Unique features like self-balancing, voltage boosting are attained, which cannot be achieved through traditional inverters. The proposed topology can operate at a wide range of modulation indices ((Formula presented.)) to produce different voltage levels. The absence of a back-end H-bridge in the proposed circuit offers low voltage stress across the semiconductors. The operating principle, capacitor sizing, and modulation approach are presented. Further, experimental tests are conducted at different loading conditions to verify the performance of the proposed circuit. © 2021 John Wiley & Sons Ltd.Item A novel nine-level inverter with reduced component count using common leg configuration(Springer Science and Business Media Deutschland GmbH, 2023) Nageswar Rao, B.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.This article proposes a nine-level (9 L) inverter with a common leg configuration employing transformers and a single dc source. The suggested inverter uses eight switches and two transformers to produce 9 L output voltage. The suggested circuit minimizes the switches and transformers compared with existing transformer-based multilevel inverters (TMLI). Therefore, the proposed circuit cost, volume and complexity are also reduced. Additionally, a thorough comparison with the various 9 L inverter circuits is conducted to ensure the benefits of the suggested TMLI. A basic logic gate-based pulse width modulation (PWM) is implemented for the suggested 9 L inverter. Simulation and hardware studies verifying the feasibility and proficiency of the suggested inverter are performed. © 2023, The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature.