Faculty Publications
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Item Synchronized SVPWM algorithm for overmodulation region for three-level VSI(2010) Veeranna, S.B.; Yaragatti, U.R.; Beig, A.R.Synchronization is essential for the satisfactory operation of VSI in high power applications. With proper selection of switching states it is possible to obtain synchronization and symmetry in space vector pulse width modulation (SVPWM) algorithm. A novel SVPWM based switching algorithm, which results in improved THD and increased fundamental voltage in overmodulation region by maintaining synchronization and symmetry is presented in this paper. A simple method to determine the switching sequence to achieve synchronization, quarter wave symmetry, half wave symmetry and three phase symmetry in overmodulation region is presented. The proposed algorithm is simulated and its performance in terms of the THD and magnitude of fundamental voltage of output is studied in the overmodulation region. The results show the improved performance of the proposed algorithm compared to the existing algorithms. The proposed algorithm is verified experimentally on a constant v/f three level VSI fed induction motor drive. © 2010 IEEE.Item Performance analysis of PWM strategies for cascaded H-bridge three-level inverter(2011) Veeranna, S.B.; Beig, A.R.; Yaragatti, U.R.Multilevel inverters with various pulse width modulation strategies have established their importance in high power high performance industrial applications, as they can synthesize output waveform with improved harmonic spectrum. This paper presents the performance analysis and comparison of different PWM strategies for cascaded H-bridge three-level inverter in terms of line voltage and motor current THD with their fundamental components. It is shown that harmonic loss minimized optimal-SHEPWM strategy gives better results in terms of voltage THD compared to SPWM, SVPWM and SHEPWM strategies. © 2011 IEEE.Item Architectural framework of on-board integrator: An interface for grid connected EV(Institute of Electrical and Electronics Engineers Inc., 2017) Hampannavar, S.; Likassa, K.; Ayenew, E.; Sandeep, N.; Yaragatti, U.R.Vehicle to Grid (V2G) is the concept of connecting a group of electric vehicles (EV) to the grid for power transaction. EVs can be connected to the grid through the home interface or through the chargers available at charging stations. In this paper, a single phase on-board charger with low complexity control scheme is proposed for EV power transaction. The power flow from and to the grid is processed using two stage cascaded converters consisting of a bidirectional DC-DC and DC-AC converters. The LCL filter is used as an interface between DC-AC converter and the grid to attenuate the grid current harmonics. A proportional resonant (PR) controller is employed for the control of grid current and to enable the unity power factor operation of the DC-AC converter. The setbacks associated with the conventional proportional-integral (PI) controller for single phase system is elevated by employing PR controller. Filter design guidelines and the control strategy developed for the proposed system is numerically simulated and verified with extensive simulation carried using MATLAB/SIMULINK. The results demonstrating the feasibility and viability of the proposed system are presented. © 2017 IEEE.Item Synchronized symmetrical bus-clamping PWM strategies for three level inverter: Applications to low switching frequencies(2011) Veeranna, S.B.; Yaragatti, U.R.; Beig, A.R.The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter. © 2011 Berkeley Electronic Press. All rights reserved.Item Simplified transformer-based multilevel inverter topology and generalisations for renewable energy applications(Institution of Engineering and Technology journals@theiet.org, 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.Multilevel inverters (MLIs) generating high-quality voltage waveforms are playing a significant role in renewable energy applications. However, the requirement of higher number of power devices, complex pulse-width-modulation (PWM) and voltage unbalancing issues are the impediments associated with their direct usage. Consequently, several attempts to devise MLIs with lesser number of overall components are witnessed. This study focuses on developing a nine-level inverter comprising of a single transformer and reduced component count. An optimisation of the number of transformers and their turn's ratio for a given number of voltage levels resulting in the least number of switches is investigated and deliberated in detail. Besides, an uncomplicated logic gate-based PWM strategy is developed for generating the gating signals of switches using simple Boolean logic relations. A detailed comparison with other recommended MLI topologies is presented to highlight the notable features of the proposed topology. Simulation results obtained using the model developed in MATLAB/Simulink along with the experimental measurements obtained from a downscale prototype is presented to validate the practicability, effectiveness, and viability of the proposed topology. An explicit agreement among the simulation and experimental results is observed. © The Institution of Engineering and Technology 2017.Item A Switched-Capacitor-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.This letter presents an improved sensorless nine-level inverter topology with reduced number of components. It is formed by cascading a three-level T-Type neutral clamped point inverter with a floating capacitor (FC) fed two-level converter unit. Additionally, two line-frequency switches are appended across the dc-link. A simple logic-form equations-based pulse width modulator is designed which is in-charge of maintaining the FC voltage at its reference value without any aid of voltage and current sensor. Thus, the complexity in control of the proposed topology is very minimal. The working principle of the proposed inverter and formulation of logic-form equations is deliberated in detail. Furthermore, experimental results obtained from the developed prototype are presented to validate feasibility and operability of the proposed topology. Finally, a comprehensive comparison with some of the recently reported inverter topologies proving the merits of the proposed topology is included. © 1986-2012 IEEE.Item Design and Implementation of Transformer-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. © 1972-2012 IEEE.